llvm-6502/test/CodeGen
2015-07-18 15:56:33 +00:00
..
AArch64 [RAGreedy] Add an experimental deferred spilling feature. 2015-07-17 23:04:06 +00:00
AMDGPU Only do fmul (fadd x, x), c combine if the fadd only has one use 2015-07-17 01:14:35 +00:00
ARM ARM: Enable MachineScheduler and disable PostRAScheduler for swift. 2015-07-17 23:18:30 +00:00
BPF [bpf] rename triple names bpf_be -> bpfeb 2015-06-05 16:11:14 +00:00
CPP
Generic llc: Add a 'run-pass' option. 2015-07-06 17:44:26 +00:00
Hexagon [Hexagon] Generate instructions for operations on predicate registers 2015-07-14 19:30:21 +00:00
Inputs
Mips [SDAG] Optimize unordered comparison in soft-float mode (patch by Anton Nadolskiy) 2015-07-15 08:39:35 +00:00
MIR MIR Parser: Allow the dollar characters in all of the identifier tokens. 2015-07-17 22:48:04 +00:00
MSP430
NVPTX Use inbounds GEPs for memcpy and memset lowering 2015-07-17 16:42:33 +00:00
PowerPC [PowerPC] v4i32 is a VSRCRegClass 2015-07-16 21:14:07 +00:00
SPARC [SPARC] Cleanup handling of the Y/ASR registers. 2015-07-08 16:25:12 +00:00
SystemZ
Thumb Move the personality function from LandingPadInst to Function 2015-06-17 20:52:32 +00:00
Thumb2 ARM: Add scheduling information for LDRLIT instructions to swift scheduling model 2015-07-17 23:18:26 +00:00
WebAssembly [WebAssembly] Create a CodeGen unittest directory. 2015-07-06 23:14:57 +00:00
WinEH [WinEH] Strip the \01 character from the __CxxFrameHandler3 thunk name 2015-07-13 17:55:14 +00:00
X86 Tidyup shufflevector calls - don't repeat inputs if you can avoid it. 2015-07-18 15:56:33 +00:00
XCore Move the personality function from LandingPadInst to Function 2015-06-17 20:52:32 +00:00