llvm-6502/test/MC/Disassembler/ARM
2011-11-15 19:55:00 +00:00
..
arm-tests.txt ARM VLDR/VSTR instructions don't need a size suffix. 2011-11-14 23:03:21 +00:00
basic-arm-instructions.txt Revert r142618, r142622, and r142624, which were based on an incorrect reading of the ARMv7 docs. 2011-10-20 22:23:58 +00:00
dg.exp
fp-encoding.txt ARM VLDR/VSTR instructions don't need a size suffix. 2011-11-14 23:03:21 +00:00
invalid-Bcc-thumb.txt
invalid-BFI-arm.txt
invalid-CPS2p-arm.txt
invalid-CPS3p-arm.txt Reapply r143202, with a manual decoding hook for SWP. This change inadvertantly exposed a decoding ambiguity between SWP and CPS that the auto-generated decoder can't handle. 2011-10-28 18:02:13 +00:00
invalid-DMB-thumb.txt
invalid-DSB-arm.txt
invalid-IT-CBNZ-thumb.txt Soft fail CBZ/CBNZ in the disassembler if they appear inside an IT block. 2011-09-08 22:42:49 +00:00
invalid-IT-thumb.txt
invalid-LDC-form-arm.txt
invalid-LDM-thumb.txt LDM writeback is not allowed if Rn is in the target register list. 2011-09-09 23:13:33 +00:00
invalid-LDR_POST-arm.txt
invalid-LDR_PRE-arm.txt
invalid-LDRB_POST-arm.txt
invalid-LDRD_PRE-thumb.txt Thumb2 assembly parsing and encoding for LDRD(immediate). 2011-09-08 22:07:06 +00:00
invalid-LDRD-arm.txt
invalid-LDRrs-arm.txt
invalid-LDRT-arm.txt
invalid-LSL-regform.txt
invalid-MCR-arm.txt
invalid-MOVr-arm.txt
invalid-MOVs-arm.txt
invalid-MOVs-LSL-arm.txt
invalid-MOVTi16-arm.txt
invalid-MSRi-arm.txt
invalid-RFEorLDMIA-arm.txt
invalid-RSC-arm.txt
invalid-SBFX-arm.txt
invalid-SMLAD-arm.txt
invalid-SRS-arm.txt
invalid-SSAT-arm.txt
invalid-STMIA_UPD-thumb.txt
invalid-STRBrs-arm.txt
invalid-SXTB-arm.txt
invalid-t2Bcc-thumb.txt
invalid-t2LDRBT-thumb.txt
invalid-t2LDREXD-thumb.txt Second of a three-patch series aiming to fix MSR/MRS on Cortex-M. This adds predicate checking to the Disassembler. 2011-09-07 19:42:28 +00:00
invalid-t2LDRSHi8-thumb.txt
invalid-t2LDRSHi12-thumb.txt
invalid-t2PUSH-thumb.txt Thumb2 POP's don't allow the PC as an operand, and PUSH's don't allow the SP either. 2011-09-12 21:28:46 +00:00
invalid-t2STR_POST-thumb.txt
invalid-t2STRD_PRE-thumb.txt Second of a three-patch series aiming to fix MSR/MRS on Cortex-M. This adds predicate checking to the Disassembler. 2011-09-07 19:42:28 +00:00
invalid-t2STREXB-thumb.txt Second of a three-patch series aiming to fix MSR/MRS on Cortex-M. This adds predicate checking to the Disassembler. 2011-09-07 19:42:28 +00:00
invalid-t2STREXD-thumb.txt
invalid-UMAAL-arm.txt
invalid-UQADD8-arm.txt
invalid-VLD1DUPq8_UPD-arm.txt Second of a three-patch series aiming to fix MSR/MRS on Cortex-M. This adds predicate checking to the Disassembler. 2011-09-07 19:42:28 +00:00
invalid-VLD3DUPd32_UPD-thumb.txt
invalid-VLDMSDB_UPD-arm.txt
invalid-VQADD-arm.txt Second of a three-patch series aiming to fix MSR/MRS on Cortex-M. This adds predicate checking to the Disassembler. 2011-09-07 19:42:28 +00:00
invalid-VST2b32_UPD-arm.txt Second of a three-patch series aiming to fix MSR/MRS on Cortex-M. This adds predicate checking to the Disassembler. 2011-09-07 19:42:28 +00:00
memory-arm-instructions.txt
neon-tests.txt Simplify some uses of utohexstr. 2011-11-07 21:00:59 +00:00
neon.txt Fix an ambiguous decoding where we failed to properly decode VMOVv2f32 and VMOVv4f32. 2011-11-15 19:55:00 +00:00
neont2.txt Simplify some uses of utohexstr. 2011-11-07 21:00:59 +00:00
thumb1.txt
thumb2.txt Fix an incorrect decoder test. 2011-09-26 23:08:34 +00:00
thumb-MSR-MClass.txt Check in a patch that has already been code reviewed by Owen that I'd forgotten to commit. 2011-09-28 14:21:38 +00:00
thumb-printf.txt Second of a three-patch series aiming to fix MSR/MRS on Cortex-M. This adds predicate checking to the Disassembler. 2011-09-07 19:42:28 +00:00
thumb-tests.txt Thumb2 assembly parsing and encoding for LDC/STC. 2011-10-12 20:54:17 +00:00