llvm-6502/test/CodeGen
2008-09-26 19:48:35 +00:00
..
Alpha
ARM Unallocatable registers do not have live intervals. 2008-09-17 18:36:25 +00:00
CBackend
CellSPU
CPP
Generic Add a target triple; apparently LLVM doesn't use 64-bit 2008-09-08 20:16:18 +00:00
IA64
Mips Added testcase for bswap allegrexel intrinsic 2008-09-15 19:38:11 +00:00
PowerPC Remove SelectionDag early allocation of registers 2008-09-24 23:13:09 +00:00
SPARC
X86 Fix @llvm.frameaddress codegen. FP elimination optimization should be disabled when frame address is desired. Also add support for depth > 0. 2008-09-26 19:48:35 +00:00