llvm-6502/test/CodeGen
Hao Liu 09ad94decb DAGCombiner: Allow the DAGCombiner to combine multiple FDIVs with the same divisor info FMULs by the reciprocal.
E.g., ( a / D; b / D ) -> ( recip = 1.0 / D; a * recip; b * recip)

A hook is added to allow the target to control whether it needs to do such combine.

Reviewed in http://reviews.llvm.org/D6334


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222510 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-21 06:39:58 +00:00
..
AArch64 DAGCombiner: Allow the DAGCombiner to combine multiple FDIVs with the same divisor info FMULs by the reciprocal. 2014-11-21 06:39:58 +00:00
ARM Fix ARM triple parsing 2014-11-17 14:08:57 +00:00
CPP
Generic
Hexagon
Inputs
Mips [mips][microMIPS] Implement CodeGen support for 16-bit instruction ADDIUR2. 2014-11-19 13:23:58 +00:00
MSP430
NVPTX
PowerPC [PPC] Use SeparateConstOffsetFromGEP 2014-11-21 04:35:51 +00:00
R600 R600/SI: Make SIInstrInfo::isOperandLegal() more strict 2014-11-19 16:58:49 +00:00
SPARC
SystemZ
Thumb [Thumb1] Re-write emitThumbRegPlusImmediate 2014-11-17 11:18:10 +00:00
Thumb2
X86 [X86] Do not custom lower UINT_TO_FP when the target type does not 2014-11-21 00:47:19 +00:00
XCore