Jakob Stoklund Olesen 09bc029865 Replace the tablegen RegisterClass field SubRegClassList with an alist-like data ... structure that represents a mapping without any dependencies on SubRegIndex numbering. This brings us closer to being able to remove the explicit SubRegIndex numbering, and it is now possible to specify any mapping without inventing *_INVALID register classes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104563 91177308-0d34-0410-b5e6-96231b3b80d8		2010-05-24 21:46:58 +00:00
..
ADT	Trivial change to dump() function for SparseBitVector	2010-05-22 05:13:17 +00:00
Analysis	Rename variable. add comment.	2010-05-20 20:35:24 +00:00
Assembly
Bitcode
CodeGen	Avoid adding duplicate function live-in's.	2010-05-24 21:33:37 +00:00
CompilerDriver
Config
ExecutionEngine
MC	MC: Add an MCLoggingStreamer, for use in debugging integrated-as mismatches.	2010-05-23 17:44:06 +00:00
Support
System
Target	Replace the tablegen RegisterClass field SubRegClassList with an alist-like data	2010-05-24 21:46:58 +00:00
Transforms
AbstractTypeUser.h
Argument.h
Attributes.h
AutoUpgrade.h
BasicBlock.h
CallGraphSCCPass.h
CallingConv.h
CMakeLists.txt
Constant.h
Constants.h
DerivedTypes.h
Function.h
GlobalAlias.h
GlobalValue.h
GlobalVariable.h
GVMaterializer.h
InlineAsm.h
InstrTypes.h
Instruction.def
Instruction.h
Instructions.h
IntrinsicInst.h
Intrinsics.h
Intrinsics.td	Implement eh.sjlj.longjmp for ARM. Clean up the intrinsic a bit.	2010-05-22 01:06:18 +00:00
IntrinsicsAlpha.td
IntrinsicsARM.td
IntrinsicsCellSPU.td
IntrinsicsPowerPC.td
IntrinsicsX86.td
IntrinsicsXCore.td
LinkAllPasses.h
LinkAllVMCore.h
Linker.h
LLVMContext.h
Metadata.h
Module.h
OperandTraits.h
Operator.h
Pass.h
PassAnalysisSupport.h
PassManager.h
PassManagers.h
PassSupport.h
SymbolTableListTraits.h
Type.h
TypeSymbolTable.h
Use.h
User.h
Value.h
ValueSymbolTable.h