Daniel Sanders 0a342e9992 [mips] Correct .MIPS.abiflags for -mfpxx on MIPS32r6 ... Summary: The cpr1_size field describes the minimum register width to run the program rather than the size of the registers on the target. MIPS32r6 was acting as if -mfp64 has been given because it starts off with 64-bit FPU registers. Differential Revision: http://reviews.llvm.org/D4538 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213243 91177308-0d34-0410-b5e6-96231b3b80d8		2014-07-17 09:57:23 +00:00
..
AArch64	[AArch64] Add negative tests for the SIMD & FP LDP instructions.	2014-07-15 16:33:24 +00:00
ARM	ARM: when falling back to scattered relocs, keep the type.	2014-07-04 10:58:05 +00:00
AsmParser
COFF	MC: Let non-temporary COFF aliases be in symtab	2014-07-13 04:31:19 +00:00
Disassembler	[SystemZ] Add MC support for LEDBRA, LEXBRA and LDXBRA	2014-07-10 11:00:55 +00:00
ELF
MachO	llvm-readobj: fix MachO relocatoin printing a bit.	2014-07-04 10:57:56 +00:00
Markup
Mips	[mips] Correct .MIPS.abiflags for -mfpxx on MIPS32r6	2014-07-17 09:57:23 +00:00
PowerPC
Sparc
SystemZ	[SystemZ] Add MC support for LEDBRA, LEXBRA and LDXBRA	2014-07-10 11:00:55 +00:00
X86	[X86] AVX512: Only allow k1-k7 as predicates to vpcmp*	2014-07-08 00:22:32 +00:00