Johnny Chen 0a3dc10eba Add N2RegVShLFrm and N2RegVShRFrm formats so that the disassembler can easily ... dispatch to the appropriate routines to handle the different interpretations of the shift amount encoded in the imm6 field. The Vd, Vm fields are interpreted the same between the two, though. See, for example, A8.6.367 VQSHL, VQSHLU (immediate) for N2RegVShLFrm format and A8.6.368 VQSHRN, VQSHRUN for N2RegVShRFrm format. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99590 91177308-0d34-0410-b5e6-96231b3b80d8		2010-03-26 01:07:59 +00:00
..
Analysis	rename pred_const_iterator to const_pred_iterator for consistency's sake	2010-03-25 23:25:28 +00:00
Archive
AsmParser
Bitcode	Finally land the InvokeInst operand reordering.	2010-03-24 13:21:49 +00:00
CodeGen	Try trivial remat before the coalescer gives up on a vr / physreg coalescing for fear of tying up a physical register.	2010-03-26 00:07:25 +00:00
CompilerDriver
ExecutionEngine	Avoid leaking argv and env arrays from lli.	2010-03-26 00:59:12 +00:00
Linker
MC	llvm-mc: Add a -mc-relax-all option, which relaxes every fixup. We always need	2010-03-25 22:49:09 +00:00
Support	Fix minor style issues.	2010-03-24 19:38:02 +00:00
System
Target	Add N2RegVShLFrm and N2RegVShRFrm formats so that the disassembler can easily	2010-03-26 01:07:59 +00:00
Transforms	Ignore debug intrinsics in yet more places.	2010-03-26 00:33:27 +00:00
VMCore	rename pred_const_iterator to const_pred_iterator for consistency's sake	2010-03-25 23:25:28 +00:00
Makefile