mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-09 10:29:21 +00:00
0a6040063f
- Added a function to hold the stack location where GP must be stored during LowerCALL - AsmPrinter now emits directives based on relocation type - PIC_ set to default relocation type (same as GCC) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42779 91177308-0d34-0410-b5e6-96231b3b80d8
489 lines
15 KiB
C++
489 lines
15 KiB
C++
//===-- MipsAsmPrinter.cpp - Mips LLVM assembly writer --------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by Bruno Cardoso Lopes and is distributed under the
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// University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains a printer that converts from our internal representation
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// of machine-dependent LLVM code to GAS-format MIPS assembly language.
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//
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "mips-asm-printer"
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#include "Mips.h"
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#include "MipsInstrInfo.h"
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#include "MipsTargetMachine.h"
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#include "MipsMachineFunction.h"
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#include "llvm/Constants.h"
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#include "llvm/DerivedTypes.h"
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#include "llvm/Module.h"
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#include "llvm/CodeGen/AsmPrinter.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineConstantPool.h"
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#include "llvm/CodeGen/MachineFrameInfo.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/Target/TargetAsmInfo.h"
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#include "llvm/Target/TargetData.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Support/Mangler.h"
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#include "llvm/ADT/Statistic.h"
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#include "llvm/ADT/SetVector.h"
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#include "llvm/ADT/StringExtras.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/MathExtras.h"
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#include <cctype>
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using namespace llvm;
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STATISTIC(EmittedInsts, "Number of machine instrs printed");
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namespace {
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struct VISIBILITY_HIDDEN MipsAsmPrinter : public AsmPrinter {
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MipsAsmPrinter(std::ostream &O, MipsTargetMachine &TM,
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const TargetAsmInfo *T):
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AsmPrinter(O, TM, T) {}
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virtual const char *getPassName() const {
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return "Mips Assembly Printer";
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}
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enum SetDirectiveFlags {
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REORDER, // enables instruction reordering.
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NOREORDER, // disables instruction reordering.
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MACRO, // enables GAS macros.
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NOMACRO // disables GAS macros.
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};
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void printOperand(const MachineInstr *MI, int opNum);
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void printMemOperand(const MachineInstr *MI, int opNum,
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const char *Modifier = 0);
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unsigned int getSavedRegsBitmask(bool isFloat, MachineFunction &MF);
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void printHex32(unsigned int Value);
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void emitFunctionStart(MachineFunction &MF);
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void emitFunctionEnd(MachineFunction &MF);
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void emitFrameDirective(MachineFunction &MF);
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void emitMaskDirective(MachineFunction &MF);
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void emitFMaskDirective(MachineFunction &MF);
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void emitSetDirective(SetDirectiveFlags Flag);
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bool printInstruction(const MachineInstr *MI); // autogenerated.
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bool runOnMachineFunction(MachineFunction &F);
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bool doInitialization(Module &M);
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bool doFinalization(Module &M);
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};
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} // end of anonymous namespace
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#include "MipsGenAsmWriter.inc"
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/// createMipsCodePrinterPass - Returns a pass that prints the MIPS
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/// assembly code for a MachineFunction to the given output stream,
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/// using the given target machine description. This should work
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/// regardless of whether the function is in SSA form.
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FunctionPass *llvm::createMipsCodePrinterPass(std::ostream &o,
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MipsTargetMachine &tm)
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{
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return new MipsAsmPrinter(o, tm, tm.getTargetAsmInfo());
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}
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//===----------------------------------------------------------------------===//
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//
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// Mips Asm Directives
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//
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// -- Frame directive "frame Stackpointer, Stacksize, RARegister"
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// Describe the stack frame.
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//
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// -- Mask directives "(f)mask bitmask, offset"
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// Tells the assembler which registers are saved and where.
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// bitmask - contain a little endian bitset indicating which registers are
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// saved on function prologue (e.g. with a 0x80000000 mask, the
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// assembler knows the register 31 (RA) is saved at prologue.
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// offset - the position before stack pointer subtraction indicating where
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// the first saved register on prologue is located. (e.g. with a
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//
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// Consider the following function prologue:
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//
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// .frame $fp,48,$ra
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// .mask 0xc0000000,-8
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// addiu $sp, $sp, -48
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// sw $ra, 40($sp)
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// sw $fp, 36($sp)
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//
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// With a 0xc0000000 mask, the assembler knows the register 31 (RA) and
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// 30 (FP) are saved at prologue. As the save order on prologue is from
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// left to right, RA is saved first. A -8 offset means that after the
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// stack pointer subtration, the first register in the mask (RA) will be
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// saved at address 48-8=40.
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//
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//===----------------------------------------------------------------------===//
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/// Mask directive for GPR
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void MipsAsmPrinter::
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emitMaskDirective(MachineFunction &MF)
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{
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MipsFunctionInfo *MipsFI = MF.getInfo<MipsFunctionInfo>();
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int StackSize = MF.getFrameInfo()->getStackSize();
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int Offset = (!MipsFI->getTopSavedRegOffset()) ? 0 :
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(-(StackSize-MipsFI->getTopSavedRegOffset()));
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#ifndef NDEBUG
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DOUT << "--> emitMaskDirective" << "\n";
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DOUT << "StackSize : " << StackSize << "\n";
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DOUT << "getTopSavedReg : " << MipsFI->getTopSavedRegOffset() << "\n";
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DOUT << "Offset : " << Offset << "\n\n";
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#endif
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unsigned int Bitmask = getSavedRegsBitmask(false, MF);
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O << "\t.mask \t";
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printHex32(Bitmask);
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O << "," << Offset << "\n";
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}
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/// TODO: Mask Directive for Float Point
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void MipsAsmPrinter::
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emitFMaskDirective(MachineFunction &MF)
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{
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unsigned int Bitmask = getSavedRegsBitmask(true, MF);
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O << "\t.fmask\t";
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printHex32(Bitmask);
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O << ",0" << "\n";
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}
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/// Frame Directive
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void MipsAsmPrinter::
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emitFrameDirective(MachineFunction &MF)
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{
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const MRegisterInfo &RI = *TM.getRegisterInfo();
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unsigned stackReg = RI.getFrameRegister(MF);
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unsigned returnReg = RI.getRARegister();
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unsigned stackSize = MF.getFrameInfo()->getStackSize();
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O << "\t.frame\t" << "$" << LowercaseString(RI.get(stackReg).Name)
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<< "," << stackSize << ","
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<< "$" << LowercaseString(RI.get(returnReg).Name)
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<< "\n";
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}
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/// Emit Set directives.
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void MipsAsmPrinter::
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emitSetDirective(SetDirectiveFlags Flag)
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{
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O << "\t.set\t";
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switch(Flag) {
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case REORDER: O << "reorder" << "\n"; break;
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case NOREORDER: O << "noreorder" << "\n"; break;
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case MACRO: O << "macro" << "\n"; break;
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case NOMACRO: O << "nomacro" << "\n"; break;
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default: break;
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}
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}
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// Create a bitmask with all callee saved registers for CPU
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// or Float Point registers. For CPU registers consider RA,
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// GP and FP for saving if necessary.
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unsigned int MipsAsmPrinter::
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getSavedRegsBitmask(bool isFloat, MachineFunction &MF)
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{
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const MRegisterInfo &RI = *TM.getRegisterInfo();
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// Float Point Registers, TODO
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if (isFloat)
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return 0;
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// CPU Registers
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unsigned int Bitmask = 0;
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MachineFrameInfo *MFI = MF.getFrameInfo();
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const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();
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for (unsigned i = 0, e = CSI.size(); i != e; ++i)
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Bitmask |= (1 << MipsRegisterInfo::getRegisterNumbering(CSI[i].getReg()));
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if (RI.hasFP(MF))
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Bitmask |= (1 << MipsRegisterInfo::
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getRegisterNumbering(RI.getFrameRegister(MF)));
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if (MF.getFrameInfo()->hasCalls())
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Bitmask |= (1 << MipsRegisterInfo::
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getRegisterNumbering(RI.getRARegister()));
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return Bitmask;
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}
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// Print a 32 bit hex number with all numbers.
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void MipsAsmPrinter::
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printHex32(unsigned int Value)
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{
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O << "0x" << std::hex;
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for (int i = 7; i >= 0; i--)
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O << std::hex << ( (Value & (0xF << (i*4))) >> (i*4) );
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O << std::dec;
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}
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/// Emit the directives used by GAS on the start of functions
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void MipsAsmPrinter::
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emitFunctionStart(MachineFunction &MF)
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{
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// Print out the label for the function.
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const Function *F = MF.getFunction();
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SwitchToTextSection(getSectionForFunction(*F).c_str(), F);
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// On Mips GAS, if .align #n is present, #n means the number of bits
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// to be cleared. So, if we want 4 byte alignment, we must have .align 2
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EmitAlignment(1, F);
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O << "\t.globl\t" << CurrentFnName << "\n";
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O << "\t.ent\t" << CurrentFnName << "\n";
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O << "\t.type\t" << CurrentFnName << ", @function\n";
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O << CurrentFnName << ":\n";
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emitFrameDirective(MF);
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emitMaskDirective(MF);
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emitFMaskDirective(MF);
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if (MF.getTarget().getRelocationModel() == Reloc::Static) {
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emitSetDirective(NOREORDER);
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emitSetDirective(NOMACRO);
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}
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O << "\n";
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}
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/// Emit the directives used by GAS on the end of functions
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void MipsAsmPrinter::
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emitFunctionEnd(MachineFunction &MF)
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{
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if (MF.getTarget().getRelocationModel() == Reloc::Static) {
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emitSetDirective(MACRO);
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emitSetDirective(REORDER);
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}
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O << "\t.end\t" << CurrentFnName << "\n";
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}
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/// runOnMachineFunction - This uses the printMachineInstruction()
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/// method to print assembly for each instruction.
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bool MipsAsmPrinter::
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runOnMachineFunction(MachineFunction &MF)
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{
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SetupMachineFunction(MF);
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// Print out constants referenced by the function
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EmitConstantPool(MF.getConstantPool());
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O << "\n\n";
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// What's my mangled name?
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CurrentFnName = Mang->getValueName(MF.getFunction());
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// Emit the function start directives
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emitFunctionStart(MF);
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// Print out code for the function.
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for (MachineFunction::const_iterator I = MF.begin(), E = MF.end();
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I != E; ++I) {
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// Print a label for the basic block.
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if (I != MF.begin()) {
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printBasicBlockLabel(I, true);
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O << '\n';
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}
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for (MachineBasicBlock::const_iterator II = I->begin(), E = I->end();
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II != E; ++II) {
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// Print the assembly for the instruction.
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O << "\t";
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printInstruction(II);
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++EmittedInsts;
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}
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}
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// Emit function end directives
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emitFunctionEnd(MF);
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// We didn't modify anything.
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return false;
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}
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void MipsAsmPrinter::
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printOperand(const MachineInstr *MI, int opNum)
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{
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const MachineOperand &MO = MI->getOperand(opNum);
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const MRegisterInfo &RI = *TM.getRegisterInfo();
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bool closeP=false;
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// %hi and %lo used on mips gas to break large constants
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if (MI->getOpcode() == Mips::LUi && !MO.isRegister()
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&& !MO.isImmediate()) {
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O << "%hi(";
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closeP = true;
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} else if ((MI->getOpcode() == Mips::ADDiu) && !MO.isRegister()
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&& !MO.isImmediate()) {
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O << "%lo(";
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closeP = true;
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}
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switch (MO.getType())
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{
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case MachineOperand::MO_Register:
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if (MRegisterInfo::isPhysicalRegister(MO.getReg()))
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O << "$" << LowercaseString (RI.get(MO.getReg()).Name);
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else
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O << "$" << MO.getReg();
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break;
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case MachineOperand::MO_Immediate:
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if ((MI->getOpcode() == Mips::SLTiu) || (MI->getOpcode() == Mips::ORi) ||
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(MI->getOpcode() == Mips::LUi) || (MI->getOpcode() == Mips::ANDi))
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O << (unsigned short int)MO.getImmedValue();
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else
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O << (short int)MO.getImmedValue();
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break;
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case MachineOperand::MO_MachineBasicBlock:
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printBasicBlockLabel(MO.getMachineBasicBlock());
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return;
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case MachineOperand::MO_GlobalAddress:
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O << Mang->getValueName(MO.getGlobal());
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break;
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case MachineOperand::MO_ExternalSymbol:
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O << MO.getSymbolName();
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break;
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case MachineOperand::MO_ConstantPoolIndex:
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O << TAI->getPrivateGlobalPrefix() << "CPI"
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<< getFunctionNumber() << "_" << MO.getConstantPoolIndex();
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break;
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default:
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O << "<unknown operand type>"; abort (); break;
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}
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if (closeP) O << ")";
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}
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void MipsAsmPrinter::
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printMemOperand(const MachineInstr *MI, int opNum, const char *Modifier)
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{
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// when using stack locations for not load/store instructions
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// print the same way as all normal 3 operand instructions.
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if (Modifier && !strcmp(Modifier, "stackloc")) {
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printOperand(MI, opNum+1);
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O << ", ";
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printOperand(MI, opNum);
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return;
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}
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// Load/Store memory operands -- imm($reg)
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printOperand(MI, opNum);
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O << "(";
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printOperand(MI, opNum+1);
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O << ")";
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}
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bool MipsAsmPrinter::
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doInitialization(Module &M)
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{
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Mang = new Mangler(M);
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return false; // success
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}
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bool MipsAsmPrinter::
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doFinalization(Module &M)
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{
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const TargetData *TD = TM.getTargetData();
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// Print out module-level global variables here.
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for (Module::const_global_iterator I = M.global_begin(),
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E = M.global_end(); I != E; ++I)
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// External global require no code
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if (I->hasInitializer()) {
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// Check to see if this is a special global
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// used by LLVM, if so, emit it.
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if (EmitSpecialLLVMGlobal(I))
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continue;
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O << "\n\n";
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std::string name = Mang->getValueName(I);
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Constant *C = I->getInitializer();
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unsigned Size = TD->getTypeSize(C->getType());
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unsigned Align = TD->getPrefTypeAlignment(C->getType());
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if (C->isNullValue() && (I->hasLinkOnceLinkage() ||
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I->hasInternalLinkage() || I->hasWeakLinkage()
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/* FIXME: Verify correct */)) {
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SwitchToDataSection(".data", I);
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if (I->hasInternalLinkage())
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O << "\t.local " << name << "\n";
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O << "\t.comm " << name << ","
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<< TD->getTypeSize(C->getType())
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<< "," << Align << "\n";
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} else {
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switch (I->getLinkage())
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{
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case GlobalValue::LinkOnceLinkage:
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case GlobalValue::WeakLinkage:
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// FIXME: Verify correct for weak.
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// Nonnull linkonce -> weak
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O << "\t.weak " << name << "\n";
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SwitchToDataSection("", I);
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O << "\t.section\t\".llvm.linkonce.d." << name
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<< "\",\"aw\",@progbits\n";
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break;
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case GlobalValue::AppendingLinkage:
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// FIXME: appending linkage variables
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// should go into a section of their name or
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// something. For now, just emit them as external.
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case GlobalValue::ExternalLinkage:
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// If external or appending, declare as a global symbol
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O << "\t.globl " << name << "\n";
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case GlobalValue::InternalLinkage:
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if (C->isNullValue())
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SwitchToDataSection(".bss", I);
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else
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SwitchToDataSection(".data", I);
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break;
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case GlobalValue::GhostLinkage:
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cerr << "Should not have any"
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<< "unmaterialized functions!\n";
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abort();
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case GlobalValue::DLLImportLinkage:
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cerr << "DLLImport linkage is"
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<< "not supported by this target!\n";
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abort();
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case GlobalValue::DLLExportLinkage:
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cerr << "DLLExport linkage is"
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<< "not supported by this target!\n";
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abort();
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default:
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assert(0 && "Unknown linkage type!");
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}
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O << "\t.align " << Align << "\n";
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O << "\t.type " << name << ",@object\n";
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O << "\t.size " << name << "," << Size << "\n";
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O << name << ":\n";
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EmitGlobalConstant(C);
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}
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}
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return AsmPrinter::doFinalization(M);
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}
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