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818 lines
36 KiB
C++
818 lines
36 KiB
C++
//===-- llvm/CodeGen/ISDOpcodes.h - CodeGen opcodes -------------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file declares codegen opcodes and related utilities.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_CODEGEN_ISDOPCODES_H
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#define LLVM_CODEGEN_ISDOPCODES_H
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namespace llvm {
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/// ISD namespace - This namespace contains an enum which represents all of the
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/// SelectionDAG node types and value types.
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///
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namespace ISD {
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//===--------------------------------------------------------------------===//
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/// ISD::NodeType enum - This enum defines the target-independent operators
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/// for a SelectionDAG.
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///
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/// Targets may also define target-dependent operator codes for SDNodes. For
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/// example, on x86, these are the enum values in the X86ISD namespace.
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/// Targets should aim to use target-independent operators to model their
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/// instruction sets as much as possible, and only use target-dependent
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/// operators when they have special requirements.
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///
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/// Finally, during and after selection proper, SNodes may use special
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/// operator codes that correspond directly with MachineInstr opcodes. These
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/// are used to represent selected instructions. See the isMachineOpcode()
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/// and getMachineOpcode() member functions of SDNode.
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///
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enum NodeType {
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/// DELETED_NODE - This is an illegal value that is used to catch
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/// errors. This opcode is not a legal opcode for any node.
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DELETED_NODE,
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/// EntryToken - This is the marker used to indicate the start of a region.
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EntryToken,
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/// TokenFactor - This node takes multiple tokens as input and produces a
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/// single token result. This is used to represent the fact that the operand
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/// operators are independent of each other.
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TokenFactor,
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/// AssertSext, AssertZext - These nodes record if a register contains a
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/// value that has already been zero or sign extended from a narrower type.
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/// These nodes take two operands. The first is the node that has already
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/// been extended, and the second is a value type node indicating the width
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/// of the extension
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AssertSext, AssertZext,
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/// Various leaf nodes.
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BasicBlock, VALUETYPE, CONDCODE, Register, RegisterMask,
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Constant, ConstantFP,
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GlobalAddress, GlobalTLSAddress, FrameIndex,
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JumpTable, ConstantPool, ExternalSymbol, BlockAddress,
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/// The address of the GOT
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GLOBAL_OFFSET_TABLE,
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/// FRAMEADDR, RETURNADDR - These nodes represent llvm.frameaddress and
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/// llvm.returnaddress on the DAG. These nodes take one operand, the index
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/// of the frame or return address to return. An index of zero corresponds
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/// to the current function's frame or return address, an index of one to
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/// the parent's frame or return address, and so on.
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FRAMEADDR, RETURNADDR,
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/// FRAME_TO_ARGS_OFFSET - This node represents offset from frame pointer to
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/// first (possible) on-stack argument. This is needed for correct stack
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/// adjustment during unwind.
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FRAME_TO_ARGS_OFFSET,
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/// OUTCHAIN = EH_RETURN(INCHAIN, OFFSET, HANDLER) - This node represents
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/// 'eh_return' gcc dwarf builtin, which is used to return from
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/// exception. The general meaning is: adjust stack by OFFSET and pass
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/// execution to HANDLER. Many platform-related details also :)
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EH_RETURN,
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/// RESULT, OUTCHAIN = EH_SJLJ_SETJMP(INCHAIN, buffer)
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/// This corresponds to the eh.sjlj.setjmp intrinsic.
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/// It takes an input chain and a pointer to the jump buffer as inputs
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/// and returns an outchain.
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EH_SJLJ_SETJMP,
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/// OUTCHAIN = EH_SJLJ_LONGJMP(INCHAIN, buffer)
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/// This corresponds to the eh.sjlj.longjmp intrinsic.
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/// It takes an input chain and a pointer to the jump buffer as inputs
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/// and returns an outchain.
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EH_SJLJ_LONGJMP,
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/// TargetConstant* - Like Constant*, but the DAG does not do any folding,
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/// simplification, or lowering of the constant. They are used for constants
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/// which are known to fit in the immediate fields of their users, or for
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/// carrying magic numbers which are not values which need to be
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/// materialized in registers.
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TargetConstant,
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TargetConstantFP,
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/// TargetGlobalAddress - Like GlobalAddress, but the DAG does no folding or
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/// anything else with this node, and this is valid in the target-specific
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/// dag, turning into a GlobalAddress operand.
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TargetGlobalAddress,
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TargetGlobalTLSAddress,
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TargetFrameIndex,
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TargetJumpTable,
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TargetConstantPool,
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TargetExternalSymbol,
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TargetBlockAddress,
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/// TargetIndex - Like a constant pool entry, but with completely
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/// target-dependent semantics. Holds target flags, a 32-bit index, and a
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/// 64-bit index. Targets can use this however they like.
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TargetIndex,
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/// RESULT = INTRINSIC_WO_CHAIN(INTRINSICID, arg1, arg2, ...)
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/// This node represents a target intrinsic function with no side effects.
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/// The first operand is the ID number of the intrinsic from the
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/// llvm::Intrinsic namespace. The operands to the intrinsic follow. The
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/// node returns the result of the intrinsic.
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INTRINSIC_WO_CHAIN,
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/// RESULT,OUTCHAIN = INTRINSIC_W_CHAIN(INCHAIN, INTRINSICID, arg1, ...)
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/// This node represents a target intrinsic function with side effects that
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/// returns a result. The first operand is a chain pointer. The second is
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/// the ID number of the intrinsic from the llvm::Intrinsic namespace. The
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/// operands to the intrinsic follow. The node has two results, the result
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/// of the intrinsic and an output chain.
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INTRINSIC_W_CHAIN,
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/// OUTCHAIN = INTRINSIC_VOID(INCHAIN, INTRINSICID, arg1, arg2, ...)
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/// This node represents a target intrinsic function with side effects that
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/// does not return a result. The first operand is a chain pointer. The
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/// second is the ID number of the intrinsic from the llvm::Intrinsic
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/// namespace. The operands to the intrinsic follow.
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INTRINSIC_VOID,
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/// CopyToReg - This node has three operands: a chain, a register number to
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/// set to this value, and a value.
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CopyToReg,
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/// CopyFromReg - This node indicates that the input value is a virtual or
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/// physical register that is defined outside of the scope of this
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/// SelectionDAG. The register is available from the RegisterSDNode object.
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CopyFromReg,
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/// UNDEF - An undefined node.
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UNDEF,
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/// EXTRACT_ELEMENT - This is used to get the lower or upper (determined by
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/// a Constant, which is required to be operand #1) half of the integer or
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/// float value specified as operand #0. This is only for use before
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/// legalization, for values that will be broken into multiple registers.
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EXTRACT_ELEMENT,
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/// BUILD_PAIR - This is the opposite of EXTRACT_ELEMENT in some ways.
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/// Given two values of the same integer value type, this produces a value
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/// twice as big. Like EXTRACT_ELEMENT, this can only be used before
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/// legalization.
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BUILD_PAIR,
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/// MERGE_VALUES - This node takes multiple discrete operands and returns
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/// them all as its individual results. This nodes has exactly the same
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/// number of inputs and outputs. This node is useful for some pieces of the
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/// code generator that want to think about a single node with multiple
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/// results, not multiple nodes.
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MERGE_VALUES,
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/// Simple integer binary arithmetic operators.
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ADD, SUB, MUL, SDIV, UDIV, SREM, UREM,
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/// SMUL_LOHI/UMUL_LOHI - Multiply two integers of type iN, producing
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/// a signed/unsigned value of type i[2*N], and return the full value as
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/// two results, each of type iN.
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SMUL_LOHI, UMUL_LOHI,
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/// SDIVREM/UDIVREM - Divide two integers and produce both a quotient and
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/// remainder result.
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SDIVREM, UDIVREM,
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/// CARRY_FALSE - This node is used when folding other nodes,
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/// like ADDC/SUBC, which indicate the carry result is always false.
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CARRY_FALSE,
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/// Carry-setting nodes for multiple precision addition and subtraction.
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/// These nodes take two operands of the same value type, and produce two
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/// results. The first result is the normal add or sub result, the second
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/// result is the carry flag result.
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ADDC, SUBC,
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/// Carry-using nodes for multiple precision addition and subtraction. These
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/// nodes take three operands: The first two are the normal lhs and rhs to
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/// the add or sub, and the third is the input carry flag. These nodes
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/// produce two results; the normal result of the add or sub, and the output
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/// carry flag. These nodes both read and write a carry flag to allow them
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/// to them to be chained together for add and sub of arbitrarily large
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/// values.
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ADDE, SUBE,
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/// RESULT, BOOL = [SU]ADDO(LHS, RHS) - Overflow-aware nodes for addition.
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/// These nodes take two operands: the normal LHS and RHS to the add. They
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/// produce two results: the normal result of the add, and a boolean that
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/// indicates if an overflow occurred (*not* a flag, because it may be store
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/// to memory, etc.). If the type of the boolean is not i1 then the high
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/// bits conform to getBooleanContents.
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/// These nodes are generated from llvm.[su]add.with.overflow intrinsics.
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SADDO, UADDO,
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/// Same for subtraction.
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SSUBO, USUBO,
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/// Same for multiplication.
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SMULO, UMULO,
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/// Simple binary floating point operators.
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FADD, FSUB, FMUL, FMA, FDIV, FREM,
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/// FCOPYSIGN(X, Y) - Return the value of X with the sign of Y. NOTE: This
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/// DAG node does not require that X and Y have the same type, just that the
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/// are both floating point. X and the result must have the same type.
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/// FCOPYSIGN(f32, f64) is allowed.
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FCOPYSIGN,
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/// INT = FGETSIGN(FP) - Return the sign bit of the specified floating point
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/// value as an integer 0/1 value.
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FGETSIGN,
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/// BUILD_VECTOR(ELT0, ELT1, ELT2, ELT3,...) - Return a vector with the
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/// specified, possibly variable, elements. The number of elements is
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/// required to be a power of two. The types of the operands must all be
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/// the same and must match the vector element type, except that integer
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/// types are allowed to be larger than the element type, in which case
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/// the operands are implicitly truncated.
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BUILD_VECTOR,
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/// INSERT_VECTOR_ELT(VECTOR, VAL, IDX) - Returns VECTOR with the element
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/// at IDX replaced with VAL. If the type of VAL is larger than the vector
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/// element type then VAL is truncated before replacement.
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INSERT_VECTOR_ELT,
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/// EXTRACT_VECTOR_ELT(VECTOR, IDX) - Returns a single element from VECTOR
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/// identified by the (potentially variable) element number IDX. If the
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/// return type is an integer type larger than the element type of the
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/// vector, the result is extended to the width of the return type.
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EXTRACT_VECTOR_ELT,
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/// CONCAT_VECTORS(VECTOR0, VECTOR1, ...) - Given a number of values of
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/// vector type with the same length and element type, this produces a
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/// concatenated vector result value, with length equal to the sum of the
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/// lengths of the input vectors.
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CONCAT_VECTORS,
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/// INSERT_SUBVECTOR(VECTOR1, VECTOR2, IDX) - Returns a vector
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/// with VECTOR2 inserted into VECTOR1 at the (potentially
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/// variable) element number IDX, which must be a multiple of the
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/// VECTOR2 vector length. The elements of VECTOR1 starting at
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/// IDX are overwritten with VECTOR2. Elements IDX through
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/// vector_length(VECTOR2) must be valid VECTOR1 indices.
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INSERT_SUBVECTOR,
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/// EXTRACT_SUBVECTOR(VECTOR, IDX) - Returns a subvector from VECTOR (an
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/// vector value) starting with the element number IDX, which must be a
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/// constant multiple of the result vector length.
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EXTRACT_SUBVECTOR,
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/// VECTOR_SHUFFLE(VEC1, VEC2) - Returns a vector, of the same type as
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/// VEC1/VEC2. A VECTOR_SHUFFLE node also contains an array of constant int
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/// values that indicate which value (or undef) each result element will
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/// get. These constant ints are accessible through the
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/// ShuffleVectorSDNode class. This is quite similar to the Altivec
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/// 'vperm' instruction, except that the indices must be constants and are
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/// in terms of the element size of VEC1/VEC2, not in terms of bytes.
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VECTOR_SHUFFLE,
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/// SCALAR_TO_VECTOR(VAL) - This represents the operation of loading a
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/// scalar value into element 0 of the resultant vector type. The top
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/// elements 1 to N-1 of the N-element vector are undefined. The type
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/// of the operand must match the vector element type, except when they
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/// are integer types. In this case the operand is allowed to be wider
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/// than the vector element type, and is implicitly truncated to it.
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SCALAR_TO_VECTOR,
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/// MULHU/MULHS - Multiply high - Multiply two integers of type iN,
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/// producing an unsigned/signed value of type i[2*N], then return the top
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/// part.
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MULHU, MULHS,
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/// Bitwise operators - logical and, logical or, logical xor.
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AND, OR, XOR,
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/// Shift and rotation operations. After legalization, the type of the
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/// shift amount is known to be TLI.getShiftAmountTy(). Before legalization
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/// the shift amount can be any type, but care must be taken to ensure it is
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/// large enough. TLI.getShiftAmountTy() is i8 on some targets, but before
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/// legalization, types like i1024 can occur and i8 doesn't have enough bits
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/// to represent the shift amount.
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/// When the 1st operand is a vector, the shift amount must be in the same
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/// type. (TLI.getShiftAmountTy() will return the same type when the input
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/// type is a vector.)
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SHL, SRA, SRL, ROTL, ROTR,
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/// Byte Swap and Counting operators.
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BSWAP, CTTZ, CTLZ, CTPOP,
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/// Bit counting operators with an undefined result for zero inputs.
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CTTZ_ZERO_UNDEF, CTLZ_ZERO_UNDEF,
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/// Select(COND, TRUEVAL, FALSEVAL). If the type of the boolean COND is not
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/// i1 then the high bits must conform to getBooleanContents.
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SELECT,
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/// Select with a vector condition (op #0) and two vector operands (ops #1
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/// and #2), returning a vector result. All vectors have the same length.
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/// Much like the scalar select and setcc, each bit in the condition selects
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/// whether the corresponding result element is taken from op #1 or op #2.
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/// At first, the VSELECT condition is of vXi1 type. Later, targets may
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/// change the condition type in order to match the VSELECT node using a
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/// pattern. The condition follows the BooleanContent format of the target.
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VSELECT,
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/// Select with condition operator - This selects between a true value and
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/// a false value (ops #2 and #3) based on the boolean result of comparing
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/// the lhs and rhs (ops #0 and #1) of a conditional expression with the
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/// condition code in op #4, a CondCodeSDNode.
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SELECT_CC,
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/// SetCC operator - This evaluates to a true value iff the condition is
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/// true. If the result value type is not i1 then the high bits conform
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/// to getBooleanContents. The operands to this are the left and right
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/// operands to compare (ops #0, and #1) and the condition code to compare
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/// them with (op #2) as a CondCodeSDNode. If the operands are vector types
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/// then the result type must also be a vector type.
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SETCC,
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/// SHL_PARTS/SRA_PARTS/SRL_PARTS - These operators are used for expanded
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/// integer shift operations, just like ADD/SUB_PARTS. The operation
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/// ordering is:
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/// [Lo,Hi] = op [LoLHS,HiLHS], Amt
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SHL_PARTS, SRA_PARTS, SRL_PARTS,
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/// Conversion operators. These are all single input single output
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/// operations. For all of these, the result type must be strictly
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/// wider or narrower (depending on the operation) than the source
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/// type.
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/// SIGN_EXTEND - Used for integer types, replicating the sign bit
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/// into new bits.
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SIGN_EXTEND,
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/// ZERO_EXTEND - Used for integer types, zeroing the new bits.
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ZERO_EXTEND,
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/// ANY_EXTEND - Used for integer types. The high bits are undefined.
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ANY_EXTEND,
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/// TRUNCATE - Completely drop the high bits.
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TRUNCATE,
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/// [SU]INT_TO_FP - These operators convert integers (whose interpreted sign
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/// depends on the first letter) to floating point.
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SINT_TO_FP,
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UINT_TO_FP,
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/// SIGN_EXTEND_INREG - This operator atomically performs a SHL/SRA pair to
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/// sign extend a small value in a large integer register (e.g. sign
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/// extending the low 8 bits of a 32-bit register to fill the top 24 bits
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/// with the 7th bit). The size of the smaller type is indicated by the 1th
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/// operand, a ValueType node.
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SIGN_EXTEND_INREG,
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/// FP_TO_[US]INT - Convert a floating point value to a signed or unsigned
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/// integer.
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FP_TO_SINT,
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FP_TO_UINT,
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/// X = FP_ROUND(Y, TRUNC) - Rounding 'Y' from a larger floating point type
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/// down to the precision of the destination VT. TRUNC is a flag, which is
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/// always an integer that is zero or one. If TRUNC is 0, this is a
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/// normal rounding, if it is 1, this FP_ROUND is known to not change the
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/// value of Y.
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///
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/// The TRUNC = 1 case is used in cases where we know that the value will
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/// not be modified by the node, because Y is not using any of the extra
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/// precision of source type. This allows certain transformations like
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/// FP_EXTEND(FP_ROUND(X,1)) -> X which are not safe for
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/// FP_EXTEND(FP_ROUND(X,0)) because the extra bits aren't removed.
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FP_ROUND,
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/// FLT_ROUNDS_ - Returns current rounding mode:
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/// -1 Undefined
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/// 0 Round to 0
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/// 1 Round to nearest
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/// 2 Round to +inf
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/// 3 Round to -inf
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FLT_ROUNDS_,
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/// X = FP_ROUND_INREG(Y, VT) - This operator takes an FP register, and
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/// rounds it to a floating point value. It then promotes it and returns it
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/// in a register of the same size. This operation effectively just
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/// discards excess precision. The type to round down to is specified by
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/// the VT operand, a VTSDNode.
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FP_ROUND_INREG,
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/// X = FP_EXTEND(Y) - Extend a smaller FP type into a larger FP type.
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FP_EXTEND,
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/// BITCAST - This operator converts between integer, vector and FP
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/// values, as if the value was stored to memory with one type and loaded
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/// from the same address with the other type (or equivalently for vector
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/// format conversions, etc). The source and result are required to have
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/// the same bit size (e.g. f32 <-> i32). This can also be used for
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/// int-to-int or fp-to-fp conversions, but that is a noop, deleted by
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/// getNode().
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BITCAST,
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/// ADDRSPACECAST - This operator converts between pointers of different
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/// address spaces.
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ADDRSPACECAST,
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/// CONVERT_RNDSAT - This operator is used to support various conversions
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/// between various types (float, signed, unsigned and vectors of those
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/// types) with rounding and saturation. NOTE: Avoid using this operator as
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/// most target don't support it and the operator might be removed in the
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/// future. It takes the following arguments:
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/// 0) value
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/// 1) dest type (type to convert to)
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/// 2) src type (type to convert from)
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/// 3) rounding imm
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/// 4) saturation imm
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/// 5) ISD::CvtCode indicating the type of conversion to do
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CONVERT_RNDSAT,
|
|
|
|
/// FP16_TO_FP32, FP32_TO_FP16 - These operators are used to perform
|
|
/// promotions and truncation for half-precision (16 bit) floating
|
|
/// numbers. We need special nodes since FP16 is a storage-only type with
|
|
/// special semantics of operations.
|
|
FP16_TO_FP32, FP32_TO_FP16,
|
|
|
|
/// FNEG, FABS, FSQRT, FSIN, FCOS, FPOWI, FPOW,
|
|
/// FLOG, FLOG2, FLOG10, FEXP, FEXP2,
|
|
/// FCEIL, FTRUNC, FRINT, FNEARBYINT, FROUND, FFLOOR - Perform various unary
|
|
/// floating point operations. These are inspired by libm.
|
|
FNEG, FABS, FSQRT, FSIN, FCOS, FPOWI, FPOW,
|
|
FLOG, FLOG2, FLOG10, FEXP, FEXP2,
|
|
FCEIL, FTRUNC, FRINT, FNEARBYINT, FROUND, FFLOOR,
|
|
|
|
/// FSINCOS - Compute both fsin and fcos as a single operation.
|
|
FSINCOS,
|
|
|
|
/// LOAD and STORE have token chains as their first operand, then the same
|
|
/// operands as an LLVM load/store instruction, then an offset node that
|
|
/// is added / subtracted from the base pointer to form the address (for
|
|
/// indexed memory ops).
|
|
LOAD, STORE,
|
|
|
|
/// DYNAMIC_STACKALLOC - Allocate some number of bytes on the stack aligned
|
|
/// to a specified boundary. This node always has two return values: a new
|
|
/// stack pointer value and a chain. The first operand is the token chain,
|
|
/// the second is the number of bytes to allocate, and the third is the
|
|
/// alignment boundary. The size is guaranteed to be a multiple of the
|
|
/// stack alignment, and the alignment is guaranteed to be bigger than the
|
|
/// stack alignment (if required) or 0 to get standard stack alignment.
|
|
DYNAMIC_STACKALLOC,
|
|
|
|
/// Control flow instructions. These all have token chains.
|
|
|
|
/// BR - Unconditional branch. The first operand is the chain
|
|
/// operand, the second is the MBB to branch to.
|
|
BR,
|
|
|
|
/// BRIND - Indirect branch. The first operand is the chain, the second
|
|
/// is the value to branch to, which must be of the same type as the
|
|
/// target's pointer type.
|
|
BRIND,
|
|
|
|
/// BR_JT - Jumptable branch. The first operand is the chain, the second
|
|
/// is the jumptable index, the last one is the jumptable entry index.
|
|
BR_JT,
|
|
|
|
/// BRCOND - Conditional branch. The first operand is the chain, the
|
|
/// second is the condition, the third is the block to branch to if the
|
|
/// condition is true. If the type of the condition is not i1, then the
|
|
/// high bits must conform to getBooleanContents.
|
|
BRCOND,
|
|
|
|
/// BR_CC - Conditional branch. The behavior is like that of SELECT_CC, in
|
|
/// that the condition is represented as condition code, and two nodes to
|
|
/// compare, rather than as a combined SetCC node. The operands in order
|
|
/// are chain, cc, lhs, rhs, block to branch to if condition is true.
|
|
BR_CC,
|
|
|
|
/// INLINEASM - Represents an inline asm block. This node always has two
|
|
/// return values: a chain and a flag result. The inputs are as follows:
|
|
/// Operand #0 : Input chain.
|
|
/// Operand #1 : a ExternalSymbolSDNode with a pointer to the asm string.
|
|
/// Operand #2 : a MDNodeSDNode with the !srcloc metadata.
|
|
/// Operand #3 : HasSideEffect, IsAlignStack bits.
|
|
/// After this, it is followed by a list of operands with this format:
|
|
/// ConstantSDNode: Flags that encode whether it is a mem or not, the
|
|
/// of operands that follow, etc. See InlineAsm.h.
|
|
/// ... however many operands ...
|
|
/// Operand #last: Optional, an incoming flag.
|
|
///
|
|
/// The variable width operands are required to represent target addressing
|
|
/// modes as a single "operand", even though they may have multiple
|
|
/// SDOperands.
|
|
INLINEASM,
|
|
|
|
/// EH_LABEL - Represents a label in mid basic block used to track
|
|
/// locations needed for debug and exception handling tables. These nodes
|
|
/// take a chain as input and return a chain.
|
|
EH_LABEL,
|
|
|
|
/// STACKSAVE - STACKSAVE has one operand, an input chain. It produces a
|
|
/// value, the same type as the pointer type for the system, and an output
|
|
/// chain.
|
|
STACKSAVE,
|
|
|
|
/// STACKRESTORE has two operands, an input chain and a pointer to restore
|
|
/// to it returns an output chain.
|
|
STACKRESTORE,
|
|
|
|
/// CALLSEQ_START/CALLSEQ_END - These operators mark the beginning and end
|
|
/// of a call sequence, and carry arbitrary information that target might
|
|
/// want to know. The first operand is a chain, the rest are specified by
|
|
/// the target and not touched by the DAG optimizers.
|
|
/// CALLSEQ_START..CALLSEQ_END pairs may not be nested.
|
|
CALLSEQ_START, // Beginning of a call sequence
|
|
CALLSEQ_END, // End of a call sequence
|
|
|
|
/// VAARG - VAARG has four operands: an input chain, a pointer, a SRCVALUE,
|
|
/// and the alignment. It returns a pair of values: the vaarg value and a
|
|
/// new chain.
|
|
VAARG,
|
|
|
|
/// VACOPY - VACOPY has 5 operands: an input chain, a destination pointer,
|
|
/// a source pointer, a SRCVALUE for the destination, and a SRCVALUE for the
|
|
/// source.
|
|
VACOPY,
|
|
|
|
/// VAEND, VASTART - VAEND and VASTART have three operands: an input chain,
|
|
/// pointer, and a SRCVALUE.
|
|
VAEND, VASTART,
|
|
|
|
/// SRCVALUE - This is a node type that holds a Value* that is used to
|
|
/// make reference to a value in the LLVM IR.
|
|
SRCVALUE,
|
|
|
|
/// MDNODE_SDNODE - This is a node that holdes an MDNode*, which is used to
|
|
/// reference metadata in the IR.
|
|
MDNODE_SDNODE,
|
|
|
|
/// PCMARKER - This corresponds to the pcmarker intrinsic.
|
|
PCMARKER,
|
|
|
|
/// READCYCLECOUNTER - This corresponds to the readcyclecounter intrinsic.
|
|
/// The only operand is a chain and a value and a chain are produced. The
|
|
/// value is the contents of the architecture specific cycle counter like
|
|
/// register (or other high accuracy low latency clock source)
|
|
READCYCLECOUNTER,
|
|
|
|
/// HANDLENODE node - Used as a handle for various purposes.
|
|
HANDLENODE,
|
|
|
|
/// INIT_TRAMPOLINE - This corresponds to the init_trampoline intrinsic. It
|
|
/// takes as input a token chain, the pointer to the trampoline, the pointer
|
|
/// to the nested function, the pointer to pass for the 'nest' parameter, a
|
|
/// SRCVALUE for the trampoline and another for the nested function
|
|
/// (allowing targets to access the original Function*).
|
|
/// It produces a token chain as output.
|
|
INIT_TRAMPOLINE,
|
|
|
|
/// ADJUST_TRAMPOLINE - This corresponds to the adjust_trampoline intrinsic.
|
|
/// It takes a pointer to the trampoline and produces a (possibly) new
|
|
/// pointer to the same trampoline with platform-specific adjustments
|
|
/// applied. The pointer it returns points to an executable block of code.
|
|
ADJUST_TRAMPOLINE,
|
|
|
|
/// TRAP - Trapping instruction
|
|
TRAP,
|
|
|
|
/// DEBUGTRAP - Trap intended to get the attention of a debugger.
|
|
DEBUGTRAP,
|
|
|
|
/// PREFETCH - This corresponds to a prefetch intrinsic. The first operand
|
|
/// is the chain. The other operands are the address to prefetch,
|
|
/// read / write specifier, locality specifier and instruction / data cache
|
|
/// specifier.
|
|
PREFETCH,
|
|
|
|
/// OUTCHAIN = ATOMIC_FENCE(INCHAIN, ordering, scope)
|
|
/// This corresponds to the fence instruction. It takes an input chain, and
|
|
/// two integer constants: an AtomicOrdering and a SynchronizationScope.
|
|
ATOMIC_FENCE,
|
|
|
|
/// Val, OUTCHAIN = ATOMIC_LOAD(INCHAIN, ptr)
|
|
/// This corresponds to "load atomic" instruction.
|
|
ATOMIC_LOAD,
|
|
|
|
/// OUTCHAIN = ATOMIC_STORE(INCHAIN, ptr, val)
|
|
/// This corresponds to "store atomic" instruction.
|
|
ATOMIC_STORE,
|
|
|
|
/// Val, OUTCHAIN = ATOMIC_CMP_SWAP(INCHAIN, ptr, cmp, swap)
|
|
/// For double-word atomic operations:
|
|
/// ValLo, ValHi, OUTCHAIN = ATOMIC_CMP_SWAP(INCHAIN, ptr, cmpLo, cmpHi,
|
|
/// swapLo, swapHi)
|
|
/// This corresponds to the cmpxchg instruction.
|
|
ATOMIC_CMP_SWAP,
|
|
|
|
/// Val, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amt)
|
|
/// Val, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN, ptr, amt)
|
|
/// For double-word atomic operations:
|
|
/// ValLo, ValHi, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amtLo, amtHi)
|
|
/// ValLo, ValHi, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN, ptr, amtLo, amtHi)
|
|
/// These correspond to the atomicrmw instruction.
|
|
ATOMIC_SWAP,
|
|
ATOMIC_LOAD_ADD,
|
|
ATOMIC_LOAD_SUB,
|
|
ATOMIC_LOAD_AND,
|
|
ATOMIC_LOAD_OR,
|
|
ATOMIC_LOAD_XOR,
|
|
ATOMIC_LOAD_NAND,
|
|
ATOMIC_LOAD_MIN,
|
|
ATOMIC_LOAD_MAX,
|
|
ATOMIC_LOAD_UMIN,
|
|
ATOMIC_LOAD_UMAX,
|
|
|
|
/// This corresponds to the llvm.lifetime.* intrinsics. The first operand
|
|
/// is the chain and the second operand is the alloca pointer.
|
|
LIFETIME_START, LIFETIME_END,
|
|
|
|
/// BUILTIN_OP_END - This must be the last enum value in this list.
|
|
/// The target-specific pre-isel opcode values start here.
|
|
BUILTIN_OP_END
|
|
};
|
|
|
|
/// FIRST_TARGET_MEMORY_OPCODE - Target-specific pre-isel operations
|
|
/// which do not reference a specific memory location should be less than
|
|
/// this value. Those that do must not be less than this value, and can
|
|
/// be used with SelectionDAG::getMemIntrinsicNode.
|
|
static const int FIRST_TARGET_MEMORY_OPCODE = BUILTIN_OP_END+180;
|
|
|
|
//===--------------------------------------------------------------------===//
|
|
/// MemIndexedMode enum - This enum defines the load / store indexed
|
|
/// addressing modes.
|
|
///
|
|
/// UNINDEXED "Normal" load / store. The effective address is already
|
|
/// computed and is available in the base pointer. The offset
|
|
/// operand is always undefined. In addition to producing a
|
|
/// chain, an unindexed load produces one value (result of the
|
|
/// load); an unindexed store does not produce a value.
|
|
///
|
|
/// PRE_INC Similar to the unindexed mode where the effective address is
|
|
/// PRE_DEC the value of the base pointer add / subtract the offset.
|
|
/// It considers the computation as being folded into the load /
|
|
/// store operation (i.e. the load / store does the address
|
|
/// computation as well as performing the memory transaction).
|
|
/// The base operand is always undefined. In addition to
|
|
/// producing a chain, pre-indexed load produces two values
|
|
/// (result of the load and the result of the address
|
|
/// computation); a pre-indexed store produces one value (result
|
|
/// of the address computation).
|
|
///
|
|
/// POST_INC The effective address is the value of the base pointer. The
|
|
/// POST_DEC value of the offset operand is then added to / subtracted
|
|
/// from the base after memory transaction. In addition to
|
|
/// producing a chain, post-indexed load produces two values
|
|
/// (the result of the load and the result of the base +/- offset
|
|
/// computation); a post-indexed store produces one value (the
|
|
/// the result of the base +/- offset computation).
|
|
enum MemIndexedMode {
|
|
UNINDEXED = 0,
|
|
PRE_INC,
|
|
PRE_DEC,
|
|
POST_INC,
|
|
POST_DEC,
|
|
LAST_INDEXED_MODE
|
|
};
|
|
|
|
//===--------------------------------------------------------------------===//
|
|
/// LoadExtType enum - This enum defines the three variants of LOADEXT
|
|
/// (load with extension).
|
|
///
|
|
/// SEXTLOAD loads the integer operand and sign extends it to a larger
|
|
/// integer result type.
|
|
/// ZEXTLOAD loads the integer operand and zero extends it to a larger
|
|
/// integer result type.
|
|
/// EXTLOAD is used for two things: floating point extending loads and
|
|
/// integer extending loads [the top bits are undefined].
|
|
enum LoadExtType {
|
|
NON_EXTLOAD = 0,
|
|
EXTLOAD,
|
|
SEXTLOAD,
|
|
ZEXTLOAD,
|
|
LAST_LOADEXT_TYPE
|
|
};
|
|
|
|
//===--------------------------------------------------------------------===//
|
|
/// ISD::CondCode enum - These are ordered carefully to make the bitfields
|
|
/// below work out, when considering SETFALSE (something that never exists
|
|
/// dynamically) as 0. "U" -> Unsigned (for integer operands) or Unordered
|
|
/// (for floating point), "L" -> Less than, "G" -> Greater than, "E" -> Equal
|
|
/// to. If the "N" column is 1, the result of the comparison is undefined if
|
|
/// the input is a NAN.
|
|
///
|
|
/// All of these (except for the 'always folded ops') should be handled for
|
|
/// floating point. For integer, only the SETEQ,SETNE,SETLT,SETLE,SETGT,
|
|
/// SETGE,SETULT,SETULE,SETUGT, and SETUGE opcodes are used.
|
|
///
|
|
/// Note that these are laid out in a specific order to allow bit-twiddling
|
|
/// to transform conditions.
|
|
enum CondCode {
|
|
// Opcode N U L G E Intuitive operation
|
|
SETFALSE, // 0 0 0 0 Always false (always folded)
|
|
SETOEQ, // 0 0 0 1 True if ordered and equal
|
|
SETOGT, // 0 0 1 0 True if ordered and greater than
|
|
SETOGE, // 0 0 1 1 True if ordered and greater than or equal
|
|
SETOLT, // 0 1 0 0 True if ordered and less than
|
|
SETOLE, // 0 1 0 1 True if ordered and less than or equal
|
|
SETONE, // 0 1 1 0 True if ordered and operands are unequal
|
|
SETO, // 0 1 1 1 True if ordered (no nans)
|
|
SETUO, // 1 0 0 0 True if unordered: isnan(X) | isnan(Y)
|
|
SETUEQ, // 1 0 0 1 True if unordered or equal
|
|
SETUGT, // 1 0 1 0 True if unordered or greater than
|
|
SETUGE, // 1 0 1 1 True if unordered, greater than, or equal
|
|
SETULT, // 1 1 0 0 True if unordered or less than
|
|
SETULE, // 1 1 0 1 True if unordered, less than, or equal
|
|
SETUNE, // 1 1 1 0 True if unordered or not equal
|
|
SETTRUE, // 1 1 1 1 Always true (always folded)
|
|
// Don't care operations: undefined if the input is a nan.
|
|
SETFALSE2, // 1 X 0 0 0 Always false (always folded)
|
|
SETEQ, // 1 X 0 0 1 True if equal
|
|
SETGT, // 1 X 0 1 0 True if greater than
|
|
SETGE, // 1 X 0 1 1 True if greater than or equal
|
|
SETLT, // 1 X 1 0 0 True if less than
|
|
SETLE, // 1 X 1 0 1 True if less than or equal
|
|
SETNE, // 1 X 1 1 0 True if not equal
|
|
SETTRUE2, // 1 X 1 1 1 Always true (always folded)
|
|
|
|
SETCC_INVALID // Marker value.
|
|
};
|
|
|
|
/// isSignedIntSetCC - Return true if this is a setcc instruction that
|
|
/// performs a signed comparison when used with integer operands.
|
|
inline bool isSignedIntSetCC(CondCode Code) {
|
|
return Code == SETGT || Code == SETGE || Code == SETLT || Code == SETLE;
|
|
}
|
|
|
|
/// isUnsignedIntSetCC - Return true if this is a setcc instruction that
|
|
/// performs an unsigned comparison when used with integer operands.
|
|
inline bool isUnsignedIntSetCC(CondCode Code) {
|
|
return Code == SETUGT || Code == SETUGE || Code == SETULT || Code == SETULE;
|
|
}
|
|
|
|
/// isTrueWhenEqual - Return true if the specified condition returns true if
|
|
/// the two operands to the condition are equal. Note that if one of the two
|
|
/// operands is a NaN, this value is meaningless.
|
|
inline bool isTrueWhenEqual(CondCode Cond) {
|
|
return ((int)Cond & 1) != 0;
|
|
}
|
|
|
|
/// getUnorderedFlavor - This function returns 0 if the condition is always
|
|
/// false if an operand is a NaN, 1 if the condition is always true if the
|
|
/// operand is a NaN, and 2 if the condition is undefined if the operand is a
|
|
/// NaN.
|
|
inline unsigned getUnorderedFlavor(CondCode Cond) {
|
|
return ((int)Cond >> 3) & 3;
|
|
}
|
|
|
|
/// getSetCCInverse - Return the operation corresponding to !(X op Y), where
|
|
/// 'op' is a valid SetCC operation.
|
|
CondCode getSetCCInverse(CondCode Operation, bool isInteger);
|
|
|
|
/// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
|
|
/// when given the operation for (X op Y).
|
|
CondCode getSetCCSwappedOperands(CondCode Operation);
|
|
|
|
/// getSetCCOrOperation - Return the result of a logical OR between different
|
|
/// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This
|
|
/// function returns SETCC_INVALID if it is not possible to represent the
|
|
/// resultant comparison.
|
|
CondCode getSetCCOrOperation(CondCode Op1, CondCode Op2, bool isInteger);
|
|
|
|
/// getSetCCAndOperation - Return the result of a logical AND between
|
|
/// different comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
|
|
/// function returns SETCC_INVALID if it is not possible to represent the
|
|
/// resultant comparison.
|
|
CondCode getSetCCAndOperation(CondCode Op1, CondCode Op2, bool isInteger);
|
|
|
|
//===--------------------------------------------------------------------===//
|
|
/// CvtCode enum - This enum defines the various converts CONVERT_RNDSAT
|
|
/// supports.
|
|
enum CvtCode {
|
|
CVT_FF, /// Float from Float
|
|
CVT_FS, /// Float from Signed
|
|
CVT_FU, /// Float from Unsigned
|
|
CVT_SF, /// Signed from Float
|
|
CVT_UF, /// Unsigned from Float
|
|
CVT_SS, /// Signed from Signed
|
|
CVT_SU, /// Signed from Unsigned
|
|
CVT_US, /// Unsigned from Signed
|
|
CVT_UU, /// Unsigned from Unsigned
|
|
CVT_INVALID /// Marker - Invalid opcode
|
|
};
|
|
|
|
} // end llvm::ISD namespace
|
|
|
|
} // end llvm namespace
|
|
|
|
#endif
|