llvm-6502/test/MC/X86
Rafael Espindola 0a70f9b3b9 Look through variables when computing relocations.
Given

bar = foo + 4
	.long bar

MC would eat the 4. GNU as includes it in the relocation. The rule seems to be
that a variable that defines a symbol is used in the relocation and one that
does not define a symbol is evaluated and the result included in the relocation.

Fixing this unfortunately required some other changes:

* Since the variable is now evaluated, it would prevent the ELF writer from
  noticing the weakref marker the elf streamer uses. This patch then replaces
  that with a VariantKind in MCSymbolRefExpr.

* Using VariantKind then requires us to look past other VariantKind to see

	.weakref	bar,foo
	call	bar@PLT

  doing this also fixes

	zed = foo +2
	call zed@PLT

  so that is a good thing.

* Looking past VariantKind means that the relocation selection has to use
  the fixup instead of the target.

This is a reboot of the previous fixes for MC. I will watch the sanitizer
buildbot and wait for a build before adding back the previous fixes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204294 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-20 02:12:01 +00:00
..
AlignedBundling
3DNow.s
2011-09-06-NoNewline.s
address-size.s
avx512-encodings.s AVX-512: masked load/store + intrinsics for them. 2014-03-13 12:05:52 +00:00
cfi_def_cfa-crash.s
fde-reloc.s
fixup-cpu-mode.s Tests for mode switching 2014-01-28 23:13:30 +00:00
gnux32-dwarf-gen.s
index-operations.s
intel-syntax-2.s
intel-syntax-avx512.s
intel-syntax-bitwise-ops.s Update the X86 assembler for .intel_syntax to accept 2014-02-06 01:21:15 +00:00
intel-syntax-directional-label.s Use printable names to implement directional labels. 2014-03-13 18:09:26 +00:00
intel-syntax-encoding.s
intel-syntax-hex.s
intel-syntax-invalid-basereg.s Update the X86 assembler for .intel_syntax to produce an error for invalid base 2014-01-23 22:34:42 +00:00
intel-syntax-invalid-scale.s Update the X86 assembler for .intel_syntax to produce an error for invalid 2014-01-23 21:52:41 +00:00
intel-syntax.s MC: Fix Intel assembly parser for [global + offset] 2014-03-04 00:33:17 +00:00
lit.local.cfg
padlock.s Remove special FP opcode maps and instead add enough MRM_XX formats to handle all the FP operations. This increases format by 1 bit, but decreases opcode map by 1 bit so the TSFlags size doesn't change. 2014-02-19 08:25:02 +00:00
relax-insn.s
reloc-undef-global.s Look through variables when computing relocations. 2014-03-20 02:12:01 +00:00
ret.s
shuffle-comments.s
stackmap-nops.ll
variant-diagnostics.s MC: fix test locations/name 2014-01-26 22:55:02 +00:00
x86_64-avx-clmul-encoding.s
x86_64-avx-encoding.s Move address override handling in X86MCCodeEmitter to a place where it works for VEX encoded instructions too. This allows 32-bit addressing to work in 64-bit mode. 2014-01-31 05:33:45 +00:00
x86_64-bmi-encoding.s
x86_64-encoding.s
x86_64-fma3-encoding.s
x86_64-fma4-encoding.s
x86_64-hle-encoding.s
x86_64-imm-widths.s
x86_64-rand-encoding.s
x86_64-rtm-encoding.s
x86_64-signed-reloc.s [x86] Fix signed relocations for i64i32imm operands 2014-01-30 22:20:41 +00:00
x86_64-sse4a.s
x86_64-tbm-encoding.s Move address override handling in X86MCCodeEmitter to a place where it works for VEX encoded instructions too. This allows 32-bit addressing to work in 64-bit mode. 2014-01-31 05:33:45 +00:00
x86_64-xop-encoding.s
x86_directives.s
x86_errors.s
x86_long_nop.s
x86_nop.s
x86_operands.s
x86-16.s
x86-32-avx.s
x86-32-coverage.s
x86-32-fma3.s
x86-32-ms-inline-asm.s
x86-32.s
x86-64.s Recommit r201059 and r201060 with hopefully a fix for its original failure. 2014-02-10 06:55:41 +00:00
x86-target-directives.s