NAKAMURA Takumi 0ac5626b56 llvm/test/CodeGen/X86/fmul-combines.ll: Appease Windows x64. <4 x float> is passed by stack. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215821 91177308-0d34-0410-b5e6-96231b3b80d8		2014-08-16 22:28:37 +00:00
..
AArch64	[AArch64] Narrow arguments passed in wrong position on the stack in	2014-08-15 14:29:57 +00:00
ARM	[AArch32] Add support for FP rounding operations for ARMv8/AArch32.	2014-08-15 21:38:16 +00:00
CPP
Generic
Hexagon
Inputs
Mips	Fix fmul combines with constant splat vectors	2014-08-16 10:14:19 +00:00
MSP430
NVPTX
PowerPC	[PowerPC] Mark fixed-offset byvals as pointed-to by IR values	2014-08-16 00:17:05 +00:00
R600	R600/SI: Move all fabs / fneg handling to patterns	2014-08-15 18:42:22 +00:00
SPARC
SystemZ
Thumb	ARM: Fix and re-enable load/store optimizer for Thumb1.	2014-08-15 17:00:30 +00:00
Thumb2	ARM: do not generate BLX instructions on Cortex-M CPUs.	2014-08-06 11:13:14 +00:00
X86	llvm/test/CodeGen/X86/fmul-combines.ll: Appease Windows x64. <4 x float> is passed by stack.	2014-08-16 22:28:37 +00:00
XCore