Oliver Stannard eb922109f9 Teach the AArch64 backend to handle f16 ... This allows the AArch64 backend to handle fadd, fsub, fmul and fdiv operations on f16 (half-precision) types by promoting to f32. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215891 91177308-0d34-0410-b5e6-96231b3b80d8		2014-08-18 14:22:39 +00:00
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AArch64	Teach the AArch64 backend to handle f16	2014-08-18 14:22:39 +00:00
ARM	[ARM,AArch64] Do not tail-call to an externally-defined function with weak linkage	2014-08-18 12:42:15 +00:00
CPP
Generic
Hexagon
Inputs
Mips	Fix fmul combines with constant splat vectors	2014-08-16 10:14:19 +00:00
MSP430
NVPTX
PowerPC	[PowerPC] Mark fixed-offset byvals as pointed-to by IR values	2014-08-16 00:17:05 +00:00
R600	R600/SI: Move all fabs / fneg handling to patterns	2014-08-15 18:42:22 +00:00
SPARC
SystemZ
Thumb	ARM: Fix and re-enable load/store optimizer for Thumb1.	2014-08-15 17:00:30 +00:00
Thumb2
X86	AVX-512: Fixed a bug in emitting compare for MVT:i1 type.	2014-08-18 11:59:06 +00:00
XCore