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https://github.com/c64scene-ar/llvm-6502.git
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aa71428378
This patch adds initial PPC64 TOC MC object creation using the small mcmodel (a single 64K TOC) adding the some TOC relocations (R_PPC64_TOC, R_PPC64_TOC16, and R_PPC64_TOC16DS). The addition of 'undefinedExplicitRelSym' hook on 'MCELFObjectTargetWriter' is meant to avoid the creation of an unreferenced ".TOC." symbol (used in the .odp creation) as well to set the R_PPC64_TOC relocation target as the temporary ".TOC." symbol. On PPC64 ABI, the R_PPC64_TOC relocation should not point to any symbol. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166677 91177308-0d34-0410-b5e6-96231b3b80d8
57 lines
2.2 KiB
C++
57 lines
2.2 KiB
C++
//===-- MCELFObjectTargetWriter.cpp - ELF Target Writer Subclass ----------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/ADT/STLExtras.h"
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#include "llvm/MC/MCELFObjectWriter.h"
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#include "llvm/MC/MCExpr.h"
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#include "llvm/MC/MCValue.h"
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using namespace llvm;
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MCELFObjectTargetWriter::MCELFObjectTargetWriter(bool Is64Bit_,
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uint8_t OSABI_,
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uint16_t EMachine_,
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bool HasRelocationAddend_,
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bool IsN64_)
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: OSABI(OSABI_), EMachine(EMachine_),
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HasRelocationAddend(HasRelocationAddend_), Is64Bit(Is64Bit_),
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IsN64(IsN64_){
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}
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/// Default e_flags = 0
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unsigned MCELFObjectTargetWriter::getEFlags() const {
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return 0;
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}
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const MCSymbol *MCELFObjectTargetWriter::ExplicitRelSym(const MCAssembler &Asm,
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const MCValue &Target,
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const MCFragment &F,
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const MCFixup &Fixup,
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bool IsPCRel) const {
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return NULL;
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}
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const MCSymbol *MCELFObjectTargetWriter::undefinedExplicitRelSym(const MCValue &Target,
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const MCFixup &Fixup,
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bool IsPCRel) const {
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const MCSymbol &Symbol = Target.getSymA()->getSymbol();
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return &Symbol.AliasedSymbol();
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}
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void MCELFObjectTargetWriter::adjustFixupOffset(const MCFixup &Fixup,
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uint64_t &RelocOffset) {
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}
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void
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MCELFObjectTargetWriter::sortRelocs(const MCAssembler &Asm,
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std::vector<ELFRelocationEntry> &Relocs) {
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// Sort by the r_offset, just like gnu as does.
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array_pod_sort(Relocs.begin(), Relocs.end());
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}
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