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https://github.com/c64scene-ar/llvm-6502.git
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0afed03229
Actual support for softening f16 operations is still limited, and can be added when it's needed. But Soften is much closer to being a useful thing to try than keeping it Legal when no registers can actually hold such values. Longer term, we probably want something between Soften and Promote semantics for most targets, it'll be more efficient to promote the 4 basic operations to f32 than libcall them. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213372 91177308-0d34-0410-b5e6-96231b3b80d8
31 lines
1013 B
LLVM
31 lines
1013 B
LLVM
; RUN: llc < %s -march=r600 -mcpu=SI | FileCheck %s
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define void @test_load_store(half addrspace(1)* %in, half addrspace(1)* %out) {
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; CHECK-LABEL: @test_load_store
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; CHECK: BUFFER_LOAD_USHORT [[TMP:v[0-9]+]]
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; CHECK: BUFFER_STORE_SHORT [[TMP]]
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%val = load half addrspace(1)* %in
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store half %val, half addrspace(1) * %out
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ret void
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}
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define void @test_bitcast_from_half(half addrspace(1)* %in, i16 addrspace(1)* %out) {
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; CHECK-LABEL: @test_bitcast_from_half
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; CHECK: BUFFER_LOAD_USHORT [[TMP:v[0-9]+]]
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; CHECK: BUFFER_STORE_SHORT [[TMP]]
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%val = load half addrspace(1) * %in
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%val_int = bitcast half %val to i16
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store i16 %val_int, i16 addrspace(1)* %out
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ret void
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}
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define void @test_bitcast_to_half(half addrspace(1)* %out, i16 addrspace(1)* %in) {
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; CHECK-LABEL: @test_bitcast_to_half
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; CHECK: BUFFER_LOAD_USHORT [[TMP:v[0-9]+]]
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; CHECK: BUFFER_STORE_SHORT [[TMP]]
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%val = load i16 addrspace(1)* %in
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%val_fp = bitcast i16 %val to half
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store half %val_fp, half addrspace(1)* %out
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ret void
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}
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