mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-29 10:32:47 +00:00
1f996fa36b
This is equivalent to the AMDGPUTargetMachine now, but it is the starting point for separating R600 and GCN functionality into separate targets. It is recommened that users start using the gcn triple for GCN-based GPUs, because using the r600 triple for these GPUs will be deprecated in the future. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225277 91177308-0d34-0410-b5e6-96231b3b80d8
21 lines
728 B
LLVM
21 lines
728 B
LLVM
; RUN: opt -codegenprepare -S -o - %s | FileCheck --check-prefix=OPT %s
|
|
; RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck --check-prefix=SI-LLC %s
|
|
|
|
target datalayout = "e-p:32:32-p1:64:64-p2:64:64-p3:32:32-p4:32:32-p5:64:64-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64"
|
|
target triple = "r600--"
|
|
|
|
; OPT-LABEL: @test
|
|
; OPT: mul nsw i32
|
|
; OPT-NEXT: sext
|
|
; SI-LLC-LABEL: {{^}}test:
|
|
; SI-LLC: s_mul_i32
|
|
; SI-LLC-NOT: mul
|
|
define void @test(i8 addrspace(1)* nocapture readonly %in, i32 %a, i8 %b) {
|
|
entry:
|
|
%0 = mul nsw i32 %a, 3
|
|
%1 = sext i32 %0 to i64
|
|
%2 = getelementptr i8 addrspace(1)* %in, i64 %1
|
|
store i8 %b, i8 addrspace(1)* %2
|
|
ret void
|
|
}
|