llvm-6502/test/CodeGen/X86/isint.ll
Stuart Hastings 10ff0bbdfb Add support for x86 CMPEQSS and friends. These instructions do a
floating-point comparison, generate a mask of 0s or 1s, and generally
DTRT with NaNs.  Only profitable when the user wants a materialized 0
or 1 at runtime.  rdar://problem/5993888


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132404 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-01 17:17:45 +00:00

35 lines
677 B
LLVM

; RUN: llc < %s -march=x86 -mattr=+sse2 | FileCheck %s
define i32 @isint_return(double %d) nounwind {
; CHECK-NOT: xor
; CHECK: cvt
%i = fptosi double %d to i32
; CHECK-NEXT: cvt
%e = sitofp i32 %i to double
; CHECK: cmpeqsd
%c = fcmp oeq double %d, %e
; CHECK-NEXT: movd
; CHECK-NEXT: andl
%z = zext i1 %c to i32
ret i32 %z
}
declare void @foo()
define void @isint_branch(double %d) nounwind {
; CHECK: cvt
%i = fptosi double %d to i32
; CHECK-NEXT: cvt
%e = sitofp i32 %i to double
; CHECK: ucomisd
%c = fcmp oeq double %d, %e
; CHECK-NEXT: jne
; CHECK-NEXT: jp
br i1 %c, label %true, label %false
true:
call void @foo()
ret void
false:
ret void
}