llvm-6502/test/CodeGen/X86/setoeq.ll
Stuart Hastings 10ff0bbdfb Add support for x86 CMPEQSS and friends. These instructions do a
floating-point comparison, generate a mask of 0s or 1s, and generally
DTRT with NaNs.  Only profitable when the user wants a materialized 0
or 1 at runtime.  rdar://problem/5993888


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132404 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-01 17:17:45 +00:00

22 lines
630 B
LLVM

; RUN: llc < %s -march=x86 | FileCheck %s
define zeroext i8 @t(double %x) nounwind readnone {
entry:
%0 = fptosi double %x to i32 ; <i32> [#uses=1]
%1 = sitofp i32 %0 to double ; <double> [#uses=1]
%2 = fcmp oeq double %1, %x ; <i1> [#uses=1]
%retval12 = zext i1 %2 to i8 ; <i8> [#uses=1]
; CHECK: cmpeqsd
ret i8 %retval12
}
define zeroext i8 @u(double %x) nounwind readnone {
entry:
%0 = fptosi double %x to i32 ; <i32> [#uses=1]
%1 = sitofp i32 %0 to double ; <double> [#uses=1]
%2 = fcmp une double %1, %x ; <i1> [#uses=1]
%retval12 = zext i1 %2 to i8 ; <i8> [#uses=1]
; CHECK: cmpneqsd
ret i8 %retval12
}