Kit Barton 40057e8ee8 Add the following 64-bit vector integer arithmetic instructions added in POWER8: ... vaddudm vsubudm vmulesw vmulosw vmuleuw vmulouw vmuluwm vmaxsd vmaxud vminsd vminud vcmpequd vcmpequd. vcmpgtsd vcmpgtsd. vcmpgtud vcmpgtud. vrld vsld vsrd vsrad Phabricator review: http://reviews.llvm.org/D7959 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231115 91177308-0d34-0410-b5e6-96231b3b80d8		2015-03-03 19:55:45 +00:00
..
AArch64	[opaque pointer type] Add textual IR support for explicit type parameter to load instruction	2015-02-27 21:17:42 +00:00
ARM	DebugInfo: Move new hierarchy into place	2015-03-03 17:24:31 +00:00
AsmParser
COFF	[opaque pointer type] Add textual IR support for explicit type parameter to load instruction	2015-02-27 21:17:42 +00:00
Disassembler	Add the following 64-bit vector integer arithmetic instructions added in POWER8:	2015-03-03 19:55:45 +00:00
ELF	DebugInfo: Move new hierarchy into place	2015-03-03 17:24:31 +00:00
Hexagon
MachO	[opaque pointer type] Add textual IR support for explicit type parameter to load instruction	2015-02-27 21:17:42 +00:00
Markup
Mips	[opaque pointer type] Add textual IR support for explicit type parameter to load instruction	2015-02-27 21:17:42 +00:00
PowerPC	Add the following 64-bit vector integer arithmetic instructions added in POWER8:	2015-03-03 19:55:45 +00:00
R600
Sparc
SystemZ	[SystemZ] Support all TLS access models - MC part	2015-02-18 09:11:36 +00:00
X86	DebugInfo: Move new hierarchy into place	2015-03-03 17:24:31 +00:00