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da8ac5fd91
Instead, just create one, and make sure everything that needs it can access it. Previously most of the SelectionDAGISel subclasses all had their own TargetLowering object, which was redundant with the TargetLowering object in the TargetMachine subclasses, except on Sparc, where SparcTargetMachine didn't have a TargetLowering object. Change Sparc to work more like the other targets here. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57016 91177308-0d34-0410-b5e6-96231b3b80d8
119 lines
3.9 KiB
C++
119 lines
3.9 KiB
C++
//===-- Sparc.h - Top-level interface for Sparc representation --*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the entry points for global functions defined in the LLVM
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// Sparc back-end.
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//
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//===----------------------------------------------------------------------===//
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#ifndef TARGET_SPARC_H
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#define TARGET_SPARC_H
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#include <iosfwd>
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#include <cassert>
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namespace llvm {
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class FunctionPass;
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class TargetMachine;
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class SparcTargetMachine;
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class raw_ostream;
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FunctionPass *createSparcISelDag(SparcTargetMachine &TM);
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FunctionPass *createSparcCodePrinterPass(raw_ostream &OS, TargetMachine &TM);
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FunctionPass *createSparcDelaySlotFillerPass(TargetMachine &TM);
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FunctionPass *createSparcFPMoverPass(TargetMachine &TM);
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} // end namespace llvm;
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// Defines symbolic names for Sparc registers. This defines a mapping from
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// register name to register number.
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//
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#include "SparcGenRegisterNames.inc"
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// Defines symbolic names for the Sparc instructions.
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//
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#include "SparcGenInstrNames.inc"
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namespace llvm {
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// Enums corresponding to Sparc condition codes, both icc's and fcc's. These
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// values must be kept in sync with the ones in the .td file.
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namespace SPCC {
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enum CondCodes {
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//ICC_A = 8 , // Always
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//ICC_N = 0 , // Never
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ICC_NE = 9 , // Not Equal
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ICC_E = 1 , // Equal
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ICC_G = 10 , // Greater
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ICC_LE = 2 , // Less or Equal
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ICC_GE = 11 , // Greater or Equal
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ICC_L = 3 , // Less
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ICC_GU = 12 , // Greater Unsigned
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ICC_LEU = 4 , // Less or Equal Unsigned
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ICC_CC = 13 , // Carry Clear/Great or Equal Unsigned
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ICC_CS = 5 , // Carry Set/Less Unsigned
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ICC_POS = 14 , // Positive
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ICC_NEG = 6 , // Negative
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ICC_VC = 15 , // Overflow Clear
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ICC_VS = 7 , // Overflow Set
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//FCC_A = 8+16, // Always
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//FCC_N = 0+16, // Never
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FCC_U = 7+16, // Unordered
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FCC_G = 6+16, // Greater
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FCC_UG = 5+16, // Unordered or Greater
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FCC_L = 4+16, // Less
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FCC_UL = 3+16, // Unordered or Less
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FCC_LG = 2+16, // Less or Greater
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FCC_NE = 1+16, // Not Equal
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FCC_E = 9+16, // Equal
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FCC_UE = 10+16, // Unordered or Equal
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FCC_GE = 11+16, // Greater or Equal
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FCC_UGE = 12+16, // Unordered or Greater or Equal
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FCC_LE = 13+16, // Less or Equal
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FCC_ULE = 14+16, // Unordered or Less or Equal
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FCC_O = 15+16 // Ordered
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};
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}
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inline static const char *SPARCCondCodeToString(SPCC::CondCodes CC) {
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switch (CC) {
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default: assert(0 && "Unknown condition code");
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case SPCC::ICC_NE: return "ne";
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case SPCC::ICC_E: return "e";
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case SPCC::ICC_G: return "g";
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case SPCC::ICC_LE: return "le";
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case SPCC::ICC_GE: return "ge";
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case SPCC::ICC_L: return "l";
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case SPCC::ICC_GU: return "gu";
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case SPCC::ICC_LEU: return "leu";
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case SPCC::ICC_CC: return "cc";
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case SPCC::ICC_CS: return "cs";
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case SPCC::ICC_POS: return "pos";
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case SPCC::ICC_NEG: return "neg";
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case SPCC::ICC_VC: return "vc";
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case SPCC::ICC_VS: return "vs";
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case SPCC::FCC_U: return "u";
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case SPCC::FCC_G: return "g";
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case SPCC::FCC_UG: return "ug";
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case SPCC::FCC_L: return "l";
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case SPCC::FCC_UL: return "ul";
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case SPCC::FCC_LG: return "lg";
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case SPCC::FCC_NE: return "ne";
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case SPCC::FCC_E: return "e";
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case SPCC::FCC_UE: return "ue";
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case SPCC::FCC_GE: return "ge";
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case SPCC::FCC_UGE: return "uge";
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case SPCC::FCC_LE: return "le";
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case SPCC::FCC_ULE: return "ule";
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case SPCC::FCC_O: return "o";
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}
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}
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} // end namespace llvm
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#endif
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