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0c57babfc6
During an indirect function call sequence on the 64-bit SVR4 ABI,
generate code must load and then restore the TOC register.
This does not use a regular LOAD instruction since the TOC
register r2 is marked as reserved. Instead, the are two
special instruction patterns:
let RST = 2, DS = 2 in
def LDinto_toc: DSForm_1a<58, 0, (outs), (ins g8rc:$reg),
"ld 2, 8($reg)", IIC_LdStLD,
[(PPCload_toc i64:$reg)]>, isPPC64;
let RST = 2, DS = 10, RA = 1 in
def LDtoc_restore : DSForm_1a<58, 0, (outs), (ins),
"ld 2, 40(1)", IIC_LdStLD,
[(PPCtoc_restore)]>, isPPC64;
Note that these not only restrict the destination of the
load to r2, but they also restrict the *source* of the
load to particular address combinations. The latter is
a problem when we want to support the ELFv2 ABI, since
there the TOC save slot is no longer at 40(1).
This patch replaces those two instructions with a single
instruction pattern that only hard-codes r2 as destination,
but supports generic addresses as source. This will allow
supporting the ELFv2 ABI, and also helps generate more
efficient code for calls to absolute addresses (allowing
simplification of the ppc64-calls.ll test case).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211193 91177308-0d34-0410-b5e6-96231b3b80d8
128 lines
4.7 KiB
C++
128 lines
4.7 KiB
C++
//===-- PPCFrameLowering.h - Define frame lowering for PowerPC --*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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//
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//===----------------------------------------------------------------------===//
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#ifndef POWERPC_FRAMEINFO_H
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#define POWERPC_FRAMEINFO_H
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#include "PPC.h"
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#include "llvm/ADT/STLExtras.h"
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#include "llvm/Target/TargetFrameLowering.h"
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#include "llvm/Target/TargetMachine.h"
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namespace llvm {
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class PPCSubtarget;
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class PPCFrameLowering: public TargetFrameLowering {
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const PPCSubtarget &Subtarget;
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public:
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PPCFrameLowering(const PPCSubtarget &STI);
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unsigned determineFrameLayout(MachineFunction &MF,
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bool UpdateMF = true,
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bool UseEstimate = false) const;
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/// emitProlog/emitEpilog - These methods insert prolog and epilog code into
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/// the function.
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void emitPrologue(MachineFunction &MF) const override;
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void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
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bool hasFP(const MachineFunction &MF) const override;
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bool needsFP(const MachineFunction &MF) const;
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void replaceFPWithRealFP(MachineFunction &MF) const;
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void processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
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RegScavenger *RS = nullptr) const override;
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void processFunctionBeforeFrameFinalized(MachineFunction &MF,
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RegScavenger *RS = nullptr) const override;
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void addScavengingSpillSlot(MachineFunction &MF, RegScavenger *RS) const;
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bool spillCalleeSavedRegisters(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MI,
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const std::vector<CalleeSavedInfo> &CSI,
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const TargetRegisterInfo *TRI) const override;
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void eliminateCallFramePseudoInstr(MachineFunction &MF,
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MachineBasicBlock &MBB,
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MachineBasicBlock::iterator I) const override;
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bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MI,
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const std::vector<CalleeSavedInfo> &CSI,
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const TargetRegisterInfo *TRI) const override;
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/// targetHandlesStackFrameRounding - Returns true if the target is
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/// responsible for rounding up the stack frame (probably at emitPrologue
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/// time).
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bool targetHandlesStackFrameRounding() const override { return true; }
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/// getReturnSaveOffset - Return the previous frame offset to save the
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/// return address.
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static unsigned getReturnSaveOffset(bool isPPC64, bool isDarwinABI) {
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if (isDarwinABI)
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return isPPC64 ? 16 : 8;
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// SVR4 ABI:
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return isPPC64 ? 16 : 4;
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}
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/// getTOCSaveOffset - Return the previous frame offset to save the
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/// TOC register -- 64-bit SVR4 ABI only.
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static unsigned getTOCSaveOffset(void) {
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return 40;
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}
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/// getFramePointerSaveOffset - Return the previous frame offset to save the
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/// frame pointer.
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static unsigned getFramePointerSaveOffset(bool isPPC64, bool isDarwinABI) {
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// For the Darwin ABI:
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// We cannot use the TOC save slot (offset +20) in the PowerPC linkage area
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// for saving the frame pointer (if needed.) While the published ABI has
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// not used this slot since at least MacOSX 10.2, there is older code
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// around that does use it, and that needs to continue to work.
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if (isDarwinABI)
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return isPPC64 ? -8U : -4U;
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// SVR4 ABI: First slot in the general register save area.
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return isPPC64 ? -8U : -4U;
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}
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/// getBasePointerSaveOffset - Return the previous frame offset to save the
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/// base pointer.
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static unsigned getBasePointerSaveOffset(bool isPPC64, bool isDarwinABI) {
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if (isDarwinABI)
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return isPPC64 ? -16U : -8U;
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// SVR4 ABI: First slot in the general register save area.
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return isPPC64 ? -16U : -8U;
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}
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/// getLinkageSize - Return the size of the PowerPC ABI linkage area.
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///
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static unsigned getLinkageSize(bool isPPC64, bool isDarwinABI) {
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if (isDarwinABI || isPPC64)
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return 6 * (isPPC64 ? 8 : 4);
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// SVR4 ABI:
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return 8;
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}
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/// getMinCallArgumentsSize - Return the size of the minium PowerPC ABI
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/// argument area.
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static unsigned getMinCallArgumentsSize(bool isPPC64, bool isDarwinABI);
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const SpillSlot *
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getCalleeSavedSpillSlots(unsigned &NumEntries) const override;
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static unsigned getMinCallFrameSize(bool isPPC64, bool isDarwinABI);
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};
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} // End llvm namespace
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#endif
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