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https://github.com/c64scene-ar/llvm-6502.git
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This update was done with the following bash script: find test/CodeGen -name "*.ll" | \ while read NAME; do echo "$NAME" if ! grep -q "^; *RUN: *llc.*debug" $NAME; then TEMP=`mktemp -t temp` cp $NAME $TEMP sed -n "s/^define [^@]*@\([A-Za-z0-9_]*\)(.*$/\1/p" < $NAME | \ while read FUNC; do sed -i '' "s/;\(.*\)\([A-Za-z0-9_-]*\):\( *\)$FUNC: *\$/;\1\2-LABEL:\3$FUNC:/g" $TEMP done sed -i '' "s/;\(.*\)-LABEL-LABEL:/;\1-LABEL:/" $TEMP sed -i '' "s/;\(.*\)-NEXT-LABEL:/;\1-NEXT:/" $TEMP sed -i '' "s/;\(.*\)-NOT-LABEL:/;\1-NOT:/" $TEMP sed -i '' "s/;\(.*\)-DAG-LABEL:/;\1-DAG:/" $TEMP mv $TEMP $NAME fi done git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186280 91177308-0d34-0410-b5e6-96231b3b80d8
154 lines
5.5 KiB
LLVM
154 lines
5.5 KiB
LLVM
; Positive test for inline register constraints
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;
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; RUN: llc -march=mipsel < %s | FileCheck -check-prefix=CHECK_LITTLE_32 %s
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; RUN: llc -march=mips < %s | FileCheck -check-prefix=CHECK_BIG_32 %s
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%union.u_tag = type { i64 }
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%struct.anon = type { i32, i32 }
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@uval = common global %union.u_tag zeroinitializer, align 8
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; X with -3
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define i32 @constraint_X() nounwind {
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entry:
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;CHECK_LITTLE_32-LABEL: constraint_X:
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;CHECK_LITTLE_32: #APP
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;CHECK_LITTLE_32: addi ${{[0-9]+}},${{[0-9]+}},0xfffffffffffffffd
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;CHECK_LITTLE_32: #NO_APP
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tail call i32 asm sideeffect "addi $0,$1,${2:X}", "=r,r,I"(i32 7, i32 -3) ;
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ret i32 0
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}
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; x with -3
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define i32 @constraint_x() nounwind {
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entry:
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;CHECK_LITTLE_32-LABEL: constraint_x:
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;CHECK_LITTLE_32: #APP
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;CHECK_LITTLE_32: addi ${{[0-9]+}},${{[0-9]+}},0xfffd
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;CHECK_LITTLE_32: #NO_APP
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tail call i32 asm sideeffect "addi $0,$1,${2:x}", "=r,r,I"(i32 7, i32 -3) ;
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ret i32 0
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}
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; d with -3
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define i32 @constraint_d() nounwind {
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entry:
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;CHECK_LITTLE_32-LABEL: constraint_d:
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;CHECK_LITTLE_32: #APP
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;CHECK_LITTLE_32: addi ${{[0-9]+}},${{[0-9]+}},-3
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;CHECK_LITTLE_32: #NO_APP
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tail call i32 asm sideeffect "addi $0,$1,${2:d}", "=r,r,I"(i32 7, i32 -3) ;
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ret i32 0
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}
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; m with -3
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define i32 @constraint_m() nounwind {
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entry:
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;CHECK_LITTLE_32-LABEL: constraint_m:
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;CHECK_LITTLE_32: #APP
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;CHECK_LITTLE_32: addi ${{[0-9]+}},${{[0-9]+}},-4
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;CHECK_LITTLE_32: #NO_APP
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tail call i32 asm sideeffect "addi $0,$1,${2:m}", "=r,r,I"(i32 7, i32 -3) ;
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ret i32 0
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}
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; z with -3
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define i32 @constraint_z() nounwind {
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entry:
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;CHECK_LITTLE_32-LABEL: constraint_z:
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;CHECK_LITTLE_32: #APP
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;CHECK_LITTLE_32: addi ${{[0-9]+}},${{[0-9]+}},-3
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;CHECK_LITTLE_32: #NO_APP
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tail call i32 asm sideeffect "addi $0,$1,${2:z}", "=r,r,I"(i32 7, i32 -3) ;
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; z with 0
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;CHECK_LITTLE_32: #APP
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;CHECK_LITTLE_32: addi ${{[0-9]+}},${{[0-9]+}},$0
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;CHECK_LITTLE_32: #NO_APP
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tail call i32 asm sideeffect "addi $0,$1,${2:z}", "=r,r,I"(i32 7, i32 0) nounwind
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ret i32 0
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}
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; a long long in 32 bit mode (use to assert)
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define i32 @constraint_longlong() nounwind {
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entry:
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;CHECK_LITTLE_32-LABEL: constraint_longlong:
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;CHECK_LITTLE_32: #APP
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;CHECK_LITTLE_32: addi ${{[0-9]+}},${{[0-9]+}},3
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;CHECK_LITTLE_32: #NO_APP
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tail call i64 asm sideeffect "addi $0,$1,$2 \0A\09", "=r,r,X"(i64 1229801703532086340, i64 3) nounwind
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ret i32 0
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}
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; D, in little endian the source reg will be 4 bytes into the long long
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define i32 @constraint_D() nounwind {
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entry:
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;CHECK_LITTLE_32-LABEL: constraint_D:
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;CHECK_LITTLE_32: lw ${{[0-9]+}}, %got(uval)(${{[0-9,a-z]+}})
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;CHECK_LITTLE_32: lw $[[SECOND:[0-9]+]], 4(${{[0-9]+}})
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;CHECK_LITTLE_32: lw $[[FIRST:[0-9]+]], 0(${{[0-9]+}})
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;CHECK_LITTLE_32: #APP
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;CHECK_LITTLE_32: or ${{[0-9]+}},$[[SECOND]],${{[0-9]+}}
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;CHECK_LITTLE_32: #NO_APP
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; D, in big endian the source reg will also be 4 bytes into the long long
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;CHECK_BIG_32-LABEL: constraint_D:
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;CHECK_BIG_32: lw ${{[0-9]+}}, %got(uval)(${{[0-9,a-z]+}})
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;CHECK_BIG_32: lw $[[SECOND:[0-9]+]], 4(${{[0-9]+}})
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;CHECK_BIG_32: lw $[[FIRST:[0-9]+]], 0(${{[0-9]+}})
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;CHECK_BIG_32: #APP
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;CHECK_BIG_32: or ${{[0-9]+}},$[[SECOND]],${{[0-9]+}}
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;CHECK_BIG_32: #NO_APP
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%bosco = load i64* getelementptr inbounds (%union.u_tag* @uval, i32 0, i32 0), align 8
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%trunc1 = trunc i64 %bosco to i32
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tail call i32 asm sideeffect "or $0,${1:D},$2", "=r,r,r"(i64 %bosco, i32 %trunc1) nounwind
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ret i32 0
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}
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; L, in little endian the source reg will be 0 bytes into the long long
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define i32 @constraint_L() nounwind {
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entry:
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;CHECK_LITTLE_32-LABEL: constraint_L:
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;CHECK_LITTLE_32: lw ${{[0-9]+}}, %got(uval)(${{[0-9,a-z]+}})
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;CHECK_LITTLE_32: lw $[[SECOND:[0-9]+]], 4(${{[0-9]+}})
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;CHECK_LITTLE_32: lw $[[FIRST:[0-9]+]], 0(${{[0-9]+}})
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;CHECK_LITTLE_32: #APP
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;CHECK_LITTLE_32: or ${{[0-9]+}},$[[FIRST]],${{[0-9]+}}
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;CHECK_LITTLE_32: #NO_APP
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; L, in big endian the source reg will be 4 bytes into the long long
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;CHECK_BIG_32-LABEL: constraint_L:
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;CHECK_BIG_32: lw ${{[0-9]+}}, %got(uval)(${{[0-9,a-z]+}})
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;CHECK_BIG_32: lw $[[SECOND:[0-9]+]], 4(${{[0-9]+}})
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;CHECK_BIG_32: lw $[[FIRST:[0-9]+]], 0(${{[0-9]+}})
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;CHECK_BIG_32: #APP
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;CHECK_BIG_32: or ${{[0-9]+}},$[[SECOND]],${{[0-9]+}}
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;CHECK_BIG_32: #NO_APP
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%bosco = load i64* getelementptr inbounds (%union.u_tag* @uval, i32 0, i32 0), align 8
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%trunc1 = trunc i64 %bosco to i32
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tail call i32 asm sideeffect "or $0,${1:L},$2", "=r,r,r"(i64 %bosco, i32 %trunc1) nounwind
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ret i32 0
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}
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; M, in little endian the source reg will be 4 bytes into the long long
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define i32 @constraint_M() nounwind {
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entry:
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;CHECK_LITTLE_32-LABEL: constraint_M:
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;CHECK_LITTLE_32: lw ${{[0-9]+}}, %got(uval)(${{[0-9,a-z]+}})
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;CHECK_LITTLE_32: lw $[[SECOND:[0-9]+]], 4(${{[0-9]+}})
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;CHECK_LITTLE_32: lw $[[FIRST:[0-9]+]], 0(${{[0-9]+}})
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;CHECK_LITTLE_32: #APP
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;CHECK_LITTLE_32: or ${{[0-9]+}},$[[SECOND]],${{[0-9]+}}
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;CHECK_LITTLE_32: #NO_APP
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; M, in big endian the source reg will be 0 bytes into the long long
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;CHECK_BIG_32-LABEL: constraint_M:
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;CHECK_BIG_32: lw ${{[0-9]+}}, %got(uval)(${{[0-9,a-z]+}})
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;CHECK_BIG_32: lw $[[SECOND:[0-9]+]], 4(${{[0-9]+}})
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;CHECK_BIG_32: lw $[[FIRST:[0-9]+]], 0(${{[0-9]+}})
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;CHECK_BIG_32: #APP
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;CHECK_BIG_32: or ${{[0-9]+}},$[[FIRST]],${{[0-9]+}}
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;CHECK_BIG_32: #NO_APP
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%bosco = load i64* getelementptr inbounds (%union.u_tag* @uval, i32 0, i32 0), align 8
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%trunc1 = trunc i64 %bosco to i32
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tail call i32 asm sideeffect "or $0,${1:M},$2", "=r,r,r"(i64 %bosco, i32 %trunc1) nounwind
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ret i32 0
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}
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