mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-11-15 04:08:07 +00:00
0ccb93034a
I added the lexing files to the VStudio projects and removed the .l files from the VStudio projects. There was a problem with use of strtoll in TGLexer.cpp and Chris suggested switching to strtol, so that's included here. Additionally, this checkin adds minimal x64 builds to the VStudio builds. Build issues related to x64 in the windows specific files for DynamicLibrary.inc and Singals.inc are worked around, but not ultimately solved. Binaries used to be stored in ...\win32\{Debug|Release} but are now kept in ...\win32\bin\{win32|x64}\{Debug|Release} intermediate files will continue to be stored in the individual project directories under win32. Some names will likely change in the future to reflect that the vstudio projects are no longer 32-bit only, but I wanted to get things up and running today so kept away from bigger restructuring. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44260 91177308-0d34-0410-b5e6-96231b3b80d8
563 lines
25 KiB
XML
563 lines
25 KiB
XML
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Name="VCCustomBuildTool"
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Description="Performing TableGen Step"
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CommandLine="echo Building $(InputFileName) register names with tblgen
$(SolutionDir)\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-enums -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterNames.inc
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Description="Performing TableGen Step"
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"
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AdditionalDependencies="$(InputDir)X86InstrInfo.td;$(InputDir)X86RegisterInfo.td;$(InputDir)X86InstrFPStack.td;$(InputDir)X86InstrMMX.td;$(InputDir)X86InstrSSE.td;$(InputDir)X86CallingConv.td;$(InputDir)..\Target.td;$(InputDir)..\TargetSchedule.td;$(InputDir)..\TargetScheduleDAG.td;$(ProjectDir)..\$(IntDir)\TableGen.exe"
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Outputs="X86GenRegisterNames.inc;X86GenRegisterInfo.h.inc;X86GenRegisterInfo.inc;X86GenInstrNames.inc;X86GenInstrInfo.inc;X86GenAsmWriter.inc;X86GenAsmWriter1.inc;X86GenDAGISel.inc;X86GenSubtarget.inc;X86GenCallingConv.inc"
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$(SolutionDir)\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-subtarget -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenSubtarget.inc
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"
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AdditionalDependencies="$(InputDir)X86InstrInfo.td;$(InputDir)X86RegisterInfo.td;$(InputDir)X86InstrFPStack.td;$(InputDir)X86InstrMMX.td;$(InputDir)X86InstrSSE.td;$(InputDir)X86CallingConv.td;$(InputDir)..\Target.td;$(InputDir)..\TargetSchedule.td;$(InputDir)..\TargetScheduleDAG.td;$(ProjectDir)..\$(IntDir)\TableGen.exe"
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Outputs="X86GenRegisterNames.inc;X86GenRegisterInfo.h.inc;X86GenRegisterInfo.inc;X86GenInstrNames.inc;X86GenInstrInfo.inc;X86GenAsmWriter.inc;X86GenAsmWriter1.inc;X86GenDAGISel.inc;X86GenSubtarget.inc;X86GenCallingConv.inc"
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|
|
Description="Performing TableGen Step"
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|
CommandLine="echo Building $(InputFileName) register names with tblgen
$(SolutionDir)\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-enums -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterNames.inc
echo Building $(InputFileName) register information header with tblgen
$(SolutionDir)\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-desc-header -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterInfo.h.inc
echo Building $(InputFileName) register information implementation with tblgen
$(SolutionDir)\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-desc -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterInfo.inc
echo Building $(InputFileName) instruction names with tblgen
$(SolutionDir)\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-instr-enums -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenInstrNames.inc
echo Building $(InputFileName) instruction information with tblgen
$(SolutionDir)\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-instr-desc -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenInstrInfo.inc
echo Building $(InputFileName) assembly writer with tblgen
$(SolutionDir)\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-asm-writer -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenAsmWriter.inc
echo Building $(InputFileName) assembly writer #1 with tblgen
$(SolutionDir)\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-asm-writer -asmwriternum=1 -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenAsmWriter1.inc
echo Building $(InputFileName) instruction selector implementation with tblgen
$(SolutionDir)\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-dag-isel -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenDAGISel.inc
echo Building $(InputFileName) subtarget information with tblgen
$(SolutionDir)\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-subtarget -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenSubtarget.inc
echo Building $(InputFileName) calling convention information with tblgen
$(SolutionDir)\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-callingconv -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenCallingConv.inc
"
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AdditionalDependencies="$(InputDir)X86InstrInfo.td;$(InputDir)X86RegisterInfo.td;$(InputDir)X86InstrFPStack.td;$(InputDir)X86InstrMMX.td;$(InputDir)X86InstrSSE.td;$(InputDir)X86CallingConv.td;$(InputDir)..\Target.td;$(InputDir)..\TargetSchedule.td;$(InputDir)..\TargetScheduleDAG.td;$(ProjectDir)..\$(IntDir)\TableGen.exe"
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Outputs="X86GenRegisterNames.inc;X86GenRegisterInfo.h.inc;X86GenRegisterInfo.inc;X86GenInstrNames.inc;X86GenInstrInfo.inc;X86GenAsmWriter.inc;X86GenAsmWriter1.inc;X86GenDAGISel.inc;X86GenSubtarget.inc;X86GenCallingConv.inc"
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/>
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</FileConfiguration>
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|
</File>
|
|
<File
|
|
RelativePath="..\..\lib\Target\X86\X86AsmPrinter.cpp"
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|
>
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|
</File>
|
|
<File
|
|
RelativePath="..\..\lib\Target\X86\X86ATTAsmPrinter.cpp"
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|
>
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|
</File>
|
|
<File
|
|
RelativePath="..\..\lib\Target\X86\X86CodeEmitter.cpp"
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|
>
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|
</File>
|
|
<File
|
|
RelativePath="..\..\lib\Target\X86\X86COFF.h"
|
|
>
|
|
</File>
|
|
<File
|
|
RelativePath="..\..\lib\Target\X86\X86ELFWriterInfo.cpp"
|
|
>
|
|
</File>
|
|
<File
|
|
RelativePath="..\..\lib\Target\X86\X86ELFWriterInfo.h"
|
|
>
|
|
</File>
|
|
<File
|
|
RelativePath="..\..\lib\Target\X86\X86FloatingPoint.cpp"
|
|
>
|
|
</File>
|
|
<File
|
|
RelativePath="..\..\lib\Target\X86\X86InstrFormats.td"
|
|
>
|
|
</File>
|
|
<File
|
|
RelativePath="..\..\lib\Target\X86\X86InstrInfo.cpp"
|
|
>
|
|
</File>
|
|
<File
|
|
RelativePath="..\..\lib\Target\X86\X86InstrX86-64.td"
|
|
>
|
|
</File>
|
|
<File
|
|
RelativePath="..\..\lib\Target\X86\X86IntelAsmPrinter.cpp"
|
|
>
|
|
</File>
|
|
<File
|
|
RelativePath="..\..\lib\Target\X86\X86ISelDAGToDAG.cpp"
|
|
>
|
|
</File>
|
|
<File
|
|
RelativePath="..\..\lib\Target\X86\X86ISelLowering.cpp"
|
|
>
|
|
</File>
|
|
<File
|
|
RelativePath="..\..\lib\Target\X86\X86JITInfo.cpp"
|
|
>
|
|
</File>
|
|
<File
|
|
RelativePath="..\..\lib\Target\X86\X86RegisterInfo.cpp"
|
|
>
|
|
</File>
|
|
<File
|
|
RelativePath="..\..\lib\Target\X86\X86Subtarget.cpp"
|
|
>
|
|
</File>
|
|
<File
|
|
RelativePath="..\..\lib\Target\X86\X86TargetAsmInfo.cpp"
|
|
>
|
|
</File>
|
|
<File
|
|
RelativePath="..\..\lib\Target\X86\X86TargetMachine.cpp"
|
|
>
|
|
</File>
|
|
</Filter>
|
|
<Filter
|
|
Name="Header Files"
|
|
Filter="h;hpp;hxx;hm;inl;inc;xsd"
|
|
UniqueIdentifier="{93995380-89BD-4b04-88EB-625FBE52EBFB}"
|
|
>
|
|
<File
|
|
RelativePath="..\..\lib\Target\Target.td"
|
|
>
|
|
</File>
|
|
<File
|
|
RelativePath="..\..\lib\Target\TargetSchedule.td"
|
|
>
|
|
</File>
|
|
<File
|
|
RelativePath="..\..\lib\Target\TargetSelectionDAG.td"
|
|
>
|
|
</File>
|
|
<File
|
|
RelativePath="..\..\lib\Target\X86\X86.h"
|
|
>
|
|
</File>
|
|
<File
|
|
RelativePath="..\..\lib\Target\X86\X86ATTAsmPrinter.h"
|
|
>
|
|
</File>
|
|
<File
|
|
RelativePath="..\..\lib\Target\X86\X86CallingConv.td"
|
|
>
|
|
</File>
|
|
<File
|
|
RelativePath="..\..\lib\Target\X86\X86InstrBuilder.h"
|
|
>
|
|
</File>
|
|
<File
|
|
RelativePath="..\..\lib\Target\X86\X86InstrFPStack.td"
|
|
>
|
|
</File>
|
|
<File
|
|
RelativePath="..\..\lib\Target\X86\X86InstrInfo.h"
|
|
>
|
|
</File>
|
|
<File
|
|
RelativePath="..\..\lib\Target\X86\X86InstrInfo.td"
|
|
>
|
|
</File>
|
|
<File
|
|
RelativePath="..\..\lib\Target\X86\X86InstrMMX.td"
|
|
>
|
|
</File>
|
|
<File
|
|
RelativePath="..\..\lib\Target\X86\X86InstrSSE.td"
|
|
>
|
|
</File>
|
|
<File
|
|
RelativePath="..\..\lib\Target\X86\X86IntelAsmPrinter.h"
|
|
>
|
|
</File>
|
|
<File
|
|
RelativePath="..\..\lib\Target\X86\X86ISelLowering.h"
|
|
>
|
|
</File>
|
|
<File
|
|
RelativePath="..\..\lib\Target\X86\X86JITInfo.h"
|
|
>
|
|
</File>
|
|
<File
|
|
RelativePath="..\..\lib\Target\X86\X86MachineFunctionInfo.h"
|
|
>
|
|
</File>
|
|
<File
|
|
RelativePath="..\..\lib\Target\X86\X86RegisterInfo.h"
|
|
>
|
|
</File>
|
|
<File
|
|
RelativePath="..\..\lib\Target\X86\X86RegisterInfo.td"
|
|
>
|
|
</File>
|
|
<File
|
|
RelativePath="..\..\lib\Target\X86\X86Subtarget.h"
|
|
>
|
|
</File>
|
|
<File
|
|
RelativePath="..\..\lib\Target\X86\X86TargetAsmInfo.h"
|
|
>
|
|
</File>
|
|
<File
|
|
RelativePath="..\..\lib\Target\X86\X86TargetMachine.h"
|
|
>
|
|
</File>
|
|
</Filter>
|
|
<Filter
|
|
Name="Generated Tablegen Files"
|
|
>
|
|
<File
|
|
RelativePath=".\X86GenAsmWriter.inc"
|
|
>
|
|
</File>
|
|
<File
|
|
RelativePath=".\X86GenAsmWriter1.inc"
|
|
>
|
|
</File>
|
|
<File
|
|
RelativePath=".\X86GenDAGISel.inc"
|
|
>
|
|
</File>
|
|
<File
|
|
RelativePath=".\X86GenInstrInfo.inc"
|
|
>
|
|
</File>
|
|
<File
|
|
RelativePath=".\X86GenInstrNames.inc"
|
|
>
|
|
</File>
|
|
<File
|
|
RelativePath=".\X86GenRegisterInfo.h.inc"
|
|
>
|
|
</File>
|
|
<File
|
|
RelativePath=".\X86GenRegisterInfo.inc"
|
|
>
|
|
</File>
|
|
<File
|
|
RelativePath=".\X86GenRegisterNames.inc"
|
|
>
|
|
</File>
|
|
<File
|
|
RelativePath=".\X86GenSubtarget.inc"
|
|
>
|
|
</File>
|
|
</Filter>
|
|
</Files>
|
|
<Globals>
|
|
</Globals>
|
|
</VisualStudioProject>
|