mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-29 10:32:47 +00:00
1f996fa36b
This is equivalent to the AMDGPUTargetMachine now, but it is the starting point for separating R600 and GCN functionality into separate targets. It is recommened that users start using the gcn triple for GCN-based GPUs, because using the r600 triple for these GPUs will be deprecated in the future. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225277 91177308-0d34-0410-b5e6-96231b3b80d8
239 lines
6.9 KiB
LLVM
239 lines
6.9 KiB
LLVM
; RUN: llc -march=amdgcn -mcpu=SI < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
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; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
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; FUNC-LABEL: {{^}}sdiv24_i8:
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; SI: v_cvt_f32_i32
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; SI: v_cvt_f32_i32
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; SI: v_rcp_f32
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; SI: v_cvt_i32_f32
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; EG: INT_TO_FLT
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; EG-DAG: INT_TO_FLT
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; EG-DAG: RECIP_IEEE
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; EG: FLT_TO_INT
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define void @sdiv24_i8(i8 addrspace(1)* %out, i8 addrspace(1)* %in) {
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%den_ptr = getelementptr i8 addrspace(1)* %in, i8 1
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%num = load i8 addrspace(1) * %in
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%den = load i8 addrspace(1) * %den_ptr
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%result = sdiv i8 %num, %den
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store i8 %result, i8 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}sdiv24_i16:
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; SI: v_cvt_f32_i32
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; SI: v_cvt_f32_i32
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; SI: v_rcp_f32
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; SI: v_cvt_i32_f32
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; EG: INT_TO_FLT
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; EG-DAG: INT_TO_FLT
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; EG-DAG: RECIP_IEEE
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; EG: FLT_TO_INT
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define void @sdiv24_i16(i16 addrspace(1)* %out, i16 addrspace(1)* %in) {
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%den_ptr = getelementptr i16 addrspace(1)* %in, i16 1
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%num = load i16 addrspace(1) * %in, align 2
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%den = load i16 addrspace(1) * %den_ptr, align 2
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%result = sdiv i16 %num, %den
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store i16 %result, i16 addrspace(1)* %out, align 2
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ret void
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}
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; FUNC-LABEL: {{^}}sdiv24_i32:
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; SI: v_cvt_f32_i32
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; SI: v_cvt_f32_i32
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; SI: v_rcp_f32
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; SI: v_cvt_i32_f32
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; EG: INT_TO_FLT
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; EG-DAG: INT_TO_FLT
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; EG-DAG: RECIP_IEEE
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; EG: FLT_TO_INT
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define void @sdiv24_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %in) {
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%den_ptr = getelementptr i32 addrspace(1)* %in, i32 1
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%num = load i32 addrspace(1) * %in, align 4
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%den = load i32 addrspace(1) * %den_ptr, align 4
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%num.i24.0 = shl i32 %num, 8
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%den.i24.0 = shl i32 %den, 8
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%num.i24 = ashr i32 %num.i24.0, 8
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%den.i24 = ashr i32 %den.i24.0, 8
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%result = sdiv i32 %num.i24, %den.i24
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store i32 %result, i32 addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: {{^}}sdiv25_i32:
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; SI-NOT: v_cvt_f32_i32
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; SI-NOT: v_rcp_f32
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; EG-NOT: INT_TO_FLT
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; EG-NOT: RECIP_IEEE
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define void @sdiv25_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %in) {
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%den_ptr = getelementptr i32 addrspace(1)* %in, i32 1
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%num = load i32 addrspace(1) * %in, align 4
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%den = load i32 addrspace(1) * %den_ptr, align 4
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%num.i24.0 = shl i32 %num, 7
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%den.i24.0 = shl i32 %den, 7
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%num.i24 = ashr i32 %num.i24.0, 7
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%den.i24 = ashr i32 %den.i24.0, 7
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%result = sdiv i32 %num.i24, %den.i24
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store i32 %result, i32 addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: {{^}}test_no_sdiv24_i32_1:
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; SI-NOT: v_cvt_f32_i32
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; SI-NOT: v_rcp_f32
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; EG-NOT: INT_TO_FLT
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; EG-NOT: RECIP_IEEE
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define void @test_no_sdiv24_i32_1(i32 addrspace(1)* %out, i32 addrspace(1)* %in) {
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%den_ptr = getelementptr i32 addrspace(1)* %in, i32 1
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%num = load i32 addrspace(1) * %in, align 4
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%den = load i32 addrspace(1) * %den_ptr, align 4
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%num.i24.0 = shl i32 %num, 8
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%den.i24.0 = shl i32 %den, 7
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%num.i24 = ashr i32 %num.i24.0, 8
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%den.i24 = ashr i32 %den.i24.0, 7
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%result = sdiv i32 %num.i24, %den.i24
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store i32 %result, i32 addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: {{^}}test_no_sdiv24_i32_2:
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; SI-NOT: v_cvt_f32_i32
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; SI-NOT: v_rcp_f32
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; EG-NOT: INT_TO_FLT
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; EG-NOT: RECIP_IEEE
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define void @test_no_sdiv24_i32_2(i32 addrspace(1)* %out, i32 addrspace(1)* %in) {
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%den_ptr = getelementptr i32 addrspace(1)* %in, i32 1
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%num = load i32 addrspace(1) * %in, align 4
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%den = load i32 addrspace(1) * %den_ptr, align 4
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%num.i24.0 = shl i32 %num, 7
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%den.i24.0 = shl i32 %den, 8
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%num.i24 = ashr i32 %num.i24.0, 7
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%den.i24 = ashr i32 %den.i24.0, 8
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%result = sdiv i32 %num.i24, %den.i24
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store i32 %result, i32 addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: {{^}}srem24_i8:
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; SI: v_cvt_f32_i32
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; SI: v_cvt_f32_i32
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; SI: v_rcp_f32
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; SI: v_cvt_i32_f32
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; EG: INT_TO_FLT
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; EG-DAG: INT_TO_FLT
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; EG-DAG: RECIP_IEEE
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; EG: FLT_TO_INT
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define void @srem24_i8(i8 addrspace(1)* %out, i8 addrspace(1)* %in) {
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%den_ptr = getelementptr i8 addrspace(1)* %in, i8 1
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%num = load i8 addrspace(1) * %in
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%den = load i8 addrspace(1) * %den_ptr
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%result = srem i8 %num, %den
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store i8 %result, i8 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}srem24_i16:
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; SI: v_cvt_f32_i32
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; SI: v_cvt_f32_i32
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; SI: v_rcp_f32
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; SI: v_cvt_i32_f32
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; EG: INT_TO_FLT
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; EG-DAG: INT_TO_FLT
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; EG-DAG: RECIP_IEEE
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; EG: FLT_TO_INT
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define void @srem24_i16(i16 addrspace(1)* %out, i16 addrspace(1)* %in) {
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%den_ptr = getelementptr i16 addrspace(1)* %in, i16 1
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%num = load i16 addrspace(1) * %in, align 2
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%den = load i16 addrspace(1) * %den_ptr, align 2
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%result = srem i16 %num, %den
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store i16 %result, i16 addrspace(1)* %out, align 2
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ret void
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}
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; FUNC-LABEL: {{^}}srem24_i32:
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; SI: v_cvt_f32_i32
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; SI: v_cvt_f32_i32
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; SI: v_rcp_f32
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; SI: v_cvt_i32_f32
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; EG: INT_TO_FLT
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; EG-DAG: INT_TO_FLT
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; EG-DAG: RECIP_IEEE
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; EG: FLT_TO_INT
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define void @srem24_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %in) {
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%den_ptr = getelementptr i32 addrspace(1)* %in, i32 1
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%num = load i32 addrspace(1) * %in, align 4
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%den = load i32 addrspace(1) * %den_ptr, align 4
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%num.i24.0 = shl i32 %num, 8
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%den.i24.0 = shl i32 %den, 8
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%num.i24 = ashr i32 %num.i24.0, 8
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%den.i24 = ashr i32 %den.i24.0, 8
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%result = srem i32 %num.i24, %den.i24
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store i32 %result, i32 addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: {{^}}srem25_i32:
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; SI-NOT: v_cvt_f32_i32
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; SI-NOT: v_rcp_f32
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; EG-NOT: INT_TO_FLT
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; EG-NOT: RECIP_IEEE
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define void @srem25_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %in) {
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%den_ptr = getelementptr i32 addrspace(1)* %in, i32 1
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%num = load i32 addrspace(1) * %in, align 4
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%den = load i32 addrspace(1) * %den_ptr, align 4
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%num.i24.0 = shl i32 %num, 7
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%den.i24.0 = shl i32 %den, 7
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%num.i24 = ashr i32 %num.i24.0, 7
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%den.i24 = ashr i32 %den.i24.0, 7
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%result = srem i32 %num.i24, %den.i24
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store i32 %result, i32 addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: {{^}}test_no_srem24_i32_1:
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; SI-NOT: v_cvt_f32_i32
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; SI-NOT: v_rcp_f32
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; EG-NOT: INT_TO_FLT
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; EG-NOT: RECIP_IEEE
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define void @test_no_srem24_i32_1(i32 addrspace(1)* %out, i32 addrspace(1)* %in) {
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%den_ptr = getelementptr i32 addrspace(1)* %in, i32 1
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%num = load i32 addrspace(1) * %in, align 4
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%den = load i32 addrspace(1) * %den_ptr, align 4
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%num.i24.0 = shl i32 %num, 8
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%den.i24.0 = shl i32 %den, 7
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%num.i24 = ashr i32 %num.i24.0, 8
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%den.i24 = ashr i32 %den.i24.0, 7
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%result = srem i32 %num.i24, %den.i24
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store i32 %result, i32 addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: {{^}}test_no_srem24_i32_2:
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; SI-NOT: v_cvt_f32_i32
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; SI-NOT: v_rcp_f32
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; EG-NOT: INT_TO_FLT
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; EG-NOT: RECIP_IEEE
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define void @test_no_srem24_i32_2(i32 addrspace(1)* %out, i32 addrspace(1)* %in) {
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%den_ptr = getelementptr i32 addrspace(1)* %in, i32 1
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%num = load i32 addrspace(1) * %in, align 4
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%den = load i32 addrspace(1) * %den_ptr, align 4
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%num.i24.0 = shl i32 %num, 7
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%den.i24.0 = shl i32 %den, 8
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%num.i24 = ashr i32 %num.i24.0, 7
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%den.i24 = ashr i32 %den.i24.0, 8
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%result = srem i32 %num.i24, %den.i24
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store i32 %result, i32 addrspace(1)* %out, align 4
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ret void
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}
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