mirror of
https://github.com/c64scene-ar/llvm-6502.git
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d275e025d2
There are some operands which can take either immediates or registers and we were previously using different register class to distinguish between operands that could take immediates and those that could not. This patch switches to using RegisterOperands which should simplify the backend by reducing the number of register classes and also make it easier to implement the assembler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225662 91177308-0d34-0410-b5e6-96231b3b80d8
67 lines
2.7 KiB
LLVM
67 lines
2.7 KiB
LLVM
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
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; RUN: llc -march=r600 -mcpu=cypress -verify-machineinstrs< %s
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declare { i32, i1 } @llvm.usub.with.overflow.i32(i32, i32) nounwind readnone
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declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) nounwind readnone
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; FUNC-LABEL: {{^}}usubo_i64_zext:
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define void @usubo_i64_zext(i64 addrspace(1)* %out, i64 %a, i64 %b) nounwind {
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%usub = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %a, i64 %b) nounwind
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%val = extractvalue { i64, i1 } %usub, 0
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%carry = extractvalue { i64, i1 } %usub, 1
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%ext = zext i1 %carry to i64
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%add2 = add i64 %val, %ext
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store i64 %add2, i64 addrspace(1)* %out, align 8
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ret void
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}
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; FUNC-LABEL: {{^}}s_usubo_i32:
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; SI: s_sub_i32
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define void @s_usubo_i32(i32 addrspace(1)* %out, i1 addrspace(1)* %carryout, i32 %a, i32 %b) nounwind {
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%usub = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %a, i32 %b) nounwind
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%val = extractvalue { i32, i1 } %usub, 0
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%carry = extractvalue { i32, i1 } %usub, 1
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store i32 %val, i32 addrspace(1)* %out, align 4
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store i1 %carry, i1 addrspace(1)* %carryout
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ret void
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}
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; FUNC-LABEL: {{^}}v_usubo_i32:
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; SI: v_subrev_i32_e32
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define void @v_usubo_i32(i32 addrspace(1)* %out, i1 addrspace(1)* %carryout, i32 addrspace(1)* %aptr, i32 addrspace(1)* %bptr) nounwind {
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%a = load i32 addrspace(1)* %aptr, align 4
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%b = load i32 addrspace(1)* %bptr, align 4
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%usub = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %a, i32 %b) nounwind
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%val = extractvalue { i32, i1 } %usub, 0
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%carry = extractvalue { i32, i1 } %usub, 1
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store i32 %val, i32 addrspace(1)* %out, align 4
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store i1 %carry, i1 addrspace(1)* %carryout
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ret void
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}
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; FUNC-LABEL: {{^}}s_usubo_i64:
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; SI: s_sub_u32
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; SI: s_subb_u32
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define void @s_usubo_i64(i64 addrspace(1)* %out, i1 addrspace(1)* %carryout, i64 %a, i64 %b) nounwind {
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%usub = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %a, i64 %b) nounwind
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%val = extractvalue { i64, i1 } %usub, 0
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%carry = extractvalue { i64, i1 } %usub, 1
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store i64 %val, i64 addrspace(1)* %out, align 8
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store i1 %carry, i1 addrspace(1)* %carryout
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ret void
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}
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; FUNC-LABEL: {{^}}v_usubo_i64:
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; SI: v_sub_i32
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; SI: v_subb_u32
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define void @v_usubo_i64(i64 addrspace(1)* %out, i1 addrspace(1)* %carryout, i64 addrspace(1)* %aptr, i64 addrspace(1)* %bptr) nounwind {
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%a = load i64 addrspace(1)* %aptr, align 4
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%b = load i64 addrspace(1)* %bptr, align 4
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%usub = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %a, i64 %b) nounwind
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%val = extractvalue { i64, i1 } %usub, 0
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%carry = extractvalue { i64, i1 } %usub, 1
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store i64 %val, i64 addrspace(1)* %out, align 8
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store i1 %carry, i1 addrspace(1)* %carryout
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ret void
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}
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