llvm-6502/test/CodeGen
2015-06-15 21:57:41 +00:00
..
AArch64 On behalf of Alexandros Lamprineas: 2015-06-15 15:48:44 +00:00
AMDGPU R600 -> AMDGPU rename 2015-06-13 03:28:10 +00:00
ARM [ARM] Disabling vfp4 should disable fp16 2015-06-12 09:38:51 +00:00
BPF
CPP
Generic
Hexagon [Hexagon] Using readobj rather than objdump. 2015-06-15 21:57:41 +00:00
Inputs
Mips
MIR MIR Serialization: Connect the machine function analysis pass to the MIR parser. 2015-06-15 20:30:22 +00:00
MSP430
NVPTX [NVPTX] fix a crash bug in NVPTXFavorNonGenericAddrSpaces 2015-06-09 21:50:32 +00:00
PowerPC LLVM support for vector quad bit permute and gather instructions through builtins 2015-06-11 06:21:25 +00:00
SPARC
SystemZ
Thumb
Thumb2
WinEH
X86 [X86][SSE] Added tests for vector i8/i16 to f32/f64 conversions 2015-06-15 21:49:31 +00:00
XCore