mirror of
https://github.com/c64scene-ar/llvm-6502.git
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7c9c6ed761
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
151 lines
4.8 KiB
LLVM
151 lines
4.8 KiB
LLVM
; RUN: opt -S < %s -loop-vectorize 2>&1 | FileCheck %s
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; RUN: opt -S < %s -loop-vectorize -force-vector-interleave=1 -force-vector-width=2 | FileCheck %s --check-prefix=FORCE-VEC
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target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128"
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target triple = "aarch64--linux-gnueabi"
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; Test integer induction variable of step 2:
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; for (int i = 0; i < 1024; i+=2) {
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; int tmp = *A++;
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; sum += i * tmp;
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; }
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; CHECK-LABEL: @ind_plus2(
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; CHECK: load <4 x i32>, <4 x i32>*
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; CHECK: load <4 x i32>, <4 x i32>*
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; CHECK: mul nsw <4 x i32>
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; CHECK: mul nsw <4 x i32>
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; CHECK: add nsw <4 x i32>
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; CHECK: add nsw <4 x i32>
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; CHECK: %index.next = add i64 %index, 8
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; CHECK: icmp eq i64 %index.next, 512
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; FORCE-VEC-LABEL: @ind_plus2(
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; FORCE-VEC: %wide.load = load <2 x i32>, <2 x i32>*
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; FORCE-VEC: mul nsw <2 x i32>
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; FORCE-VEC: add nsw <2 x i32>
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; FORCE-VEC: %index.next = add i64 %index, 2
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; FORCE-VEC: icmp eq i64 %index.next, 512
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define i32 @ind_plus2(i32* %A) {
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entry:
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br label %for.body
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for.body: ; preds = %entry, %for.body
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%A.addr = phi i32* [ %A, %entry ], [ %inc.ptr, %for.body ]
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%i = phi i32 [ 0, %entry ], [ %add1, %for.body ]
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%sum = phi i32 [ 0, %entry ], [ %add, %for.body ]
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%inc.ptr = getelementptr inbounds i32, i32* %A.addr, i64 1
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%0 = load i32, i32* %A.addr, align 4
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%mul = mul nsw i32 %0, %i
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%add = add nsw i32 %mul, %sum
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%add1 = add nsw i32 %i, 2
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%cmp = icmp slt i32 %add1, 1024
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br i1 %cmp, label %for.body, label %for.end
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for.end: ; preds = %for.body
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%add.lcssa = phi i32 [ %add, %for.body ]
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ret i32 %add.lcssa
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}
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; Test integer induction variable of step -2:
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; for (int i = 1024; i > 0; i-=2) {
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; int tmp = *A++;
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; sum += i * tmp;
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; }
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; CHECK-LABEL: @ind_minus2(
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; CHECK: load <4 x i32>, <4 x i32>*
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; CHECK: load <4 x i32>, <4 x i32>*
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; CHECK: mul nsw <4 x i32>
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; CHECK: mul nsw <4 x i32>
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; CHECK: add nsw <4 x i32>
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; CHECK: add nsw <4 x i32>
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; CHECK: %index.next = add i64 %index, 8
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; CHECK: icmp eq i64 %index.next, 512
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; FORCE-VEC-LABEL: @ind_minus2(
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; FORCE-VEC: %wide.load = load <2 x i32>, <2 x i32>*
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; FORCE-VEC: mul nsw <2 x i32>
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; FORCE-VEC: add nsw <2 x i32>
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; FORCE-VEC: %index.next = add i64 %index, 2
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; FORCE-VEC: icmp eq i64 %index.next, 512
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define i32 @ind_minus2(i32* %A) {
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entry:
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br label %for.body
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for.body: ; preds = %entry, %for.body
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%A.addr = phi i32* [ %A, %entry ], [ %inc.ptr, %for.body ]
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%i = phi i32 [ 1024, %entry ], [ %sub, %for.body ]
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%sum = phi i32 [ 0, %entry ], [ %add, %for.body ]
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%inc.ptr = getelementptr inbounds i32, i32* %A.addr, i64 1
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%0 = load i32, i32* %A.addr, align 4
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%mul = mul nsw i32 %0, %i
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%add = add nsw i32 %mul, %sum
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%sub = add nsw i32 %i, -2
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%cmp = icmp sgt i32 %i, 2
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br i1 %cmp, label %for.body, label %for.end
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for.end: ; preds = %for.body
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%add.lcssa = phi i32 [ %add, %for.body ]
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ret i32 %add.lcssa
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}
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; Test pointer induction variable of step 2. As currently we don't support
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; masked load/store, vectorization is possible but not beneficial. If loop
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; vectorization is not enforced, LV will only do interleave.
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; for (int i = 0; i < 1024; i++) {
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; int tmp0 = *A++;
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; int tmp1 = *A++;
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; sum += tmp0 * tmp1;
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; }
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; CHECK-LABEL: @ptr_ind_plus2(
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; CHECK: load i32, i32*
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; CHECK: load i32, i32*
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; CHECK: load i32, i32*
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; CHECK: load i32, i32*
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; CHECK: mul nsw i32
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; CHECK: mul nsw i32
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; CHECK: add nsw i32
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; CHECK: add nsw i32
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; CHECK: %index.next = add i64 %index, 2
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; CHECK: %21 = icmp eq i64 %index.next, 1024
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; FORCE-VEC-LABEL: @ptr_ind_plus2(
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; FORCE-VEC: load i32, i32*
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; FORCE-VEC: insertelement <2 x i32>
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; FORCE-VEC: load i32, i32*
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; FORCE-VEC: insertelement <2 x i32>
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; FORCE-VEC: load i32, i32*
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; FORCE-VEC: insertelement <2 x i32>
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; FORCE-VEC: load i32, i32*
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; FORCE-VEC: insertelement <2 x i32>
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; FORCE-VEC: mul nsw <2 x i32>
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; FORCE-VEC: add nsw <2 x i32>
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; FORCE-VEC: %index.next = add i64 %index, 2
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; FORCE-VEC: icmp eq i64 %index.next, 1024
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define i32 @ptr_ind_plus2(i32* %A) {
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entry:
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br label %for.body
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for.body: ; preds = %for.body, %entry
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%A.addr = phi i32* [ %A, %entry ], [ %inc.ptr1, %for.body ]
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%sum = phi i32 [ 0, %entry ], [ %add, %for.body ]
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%i = phi i32 [ 0, %entry ], [ %inc, %for.body ]
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%inc.ptr = getelementptr inbounds i32, i32* %A.addr, i64 1
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%0 = load i32, i32* %A.addr, align 4
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%inc.ptr1 = getelementptr inbounds i32, i32* %A.addr, i64 2
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%1 = load i32, i32* %inc.ptr, align 4
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%mul = mul nsw i32 %1, %0
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%add = add nsw i32 %mul, %sum
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%inc = add nsw i32 %i, 1
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%exitcond = icmp eq i32 %inc, 1024
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br i1 %exitcond, label %for.end, label %for.body
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for.end: ; preds = %for.body
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%add.lcssa = phi i32 [ %add, %for.body ]
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ret i32 %add.lcssa
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}
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