mirror of
https://github.com/c64scene-ar/llvm-6502.git
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7c9c6ed761
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
63 lines
1.7 KiB
LLVM
63 lines
1.7 KiB
LLVM
; Check that unaligned accesses are allowed in general. We check the
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; few exceptions (like CRL) in their respective test files.
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;
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; FIXME: -combiner-alias-analysis (the default for SystemZ) stops
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; f1 from being optimized.
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; RUN: llc < %s -mtriple=s390x-linux-gnu -combiner-alias-analysis=false \
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; RUN: | FileCheck %s
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; Check that these four byte stores become a single word store.
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define void @f1(i8 *%ptr) {
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; CHECK: f1
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; CHECK: iilf [[REG:%r[0-5]]], 66051
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; CHECK: st [[REG]], 0(%r2)
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; CHECK: br %r14
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%off1 = getelementptr i8, i8 *%ptr, i64 1
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%off2 = getelementptr i8, i8 *%ptr, i64 2
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%off3 = getelementptr i8, i8 *%ptr, i64 3
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store i8 0, i8 *%ptr
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store i8 1, i8 *%off1
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store i8 2, i8 *%off2
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store i8 3, i8 *%off3
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ret void
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}
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; Check that unaligned 2-byte accesses are allowed.
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define i16 @f2(i16 *%src, i16 *%dst) {
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; CHECK-LABEL: f2:
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; CHECK: lh %r2, 0(%r2)
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; CHECK: sth %r2, 0(%r3)
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; CHECK: br %r14
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%val = load i16 , i16 *%src, align 1
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store i16 %val, i16 *%dst, align 1
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ret i16 %val
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}
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; Check that unaligned 4-byte accesses are allowed.
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define i32 @f3(i32 *%src1, i32 *%src2, i32 *%dst) {
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; CHECK-LABEL: f3:
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; CHECK: l %r2, 0(%r2)
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; CHECK: s %r2, 0(%r3)
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; CHECK: st %r2, 0(%r4)
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; CHECK: br %r14
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%val1 = load i32 , i32 *%src1, align 1
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%val2 = load i32 , i32 *%src2, align 2
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%sub = sub i32 %val1, %val2
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store i32 %sub, i32 *%dst, align 1
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ret i32 %sub
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}
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; Check that unaligned 8-byte accesses are allowed.
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define i64 @f4(i64 *%src1, i64 *%src2, i64 *%dst) {
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; CHECK-LABEL: f4:
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; CHECK: lg %r2, 0(%r2)
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; CHECK: sg %r2, 0(%r3)
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; CHECK: stg %r2, 0(%r4)
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; CHECK: br %r14
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%val1 = load i64 , i64 *%src1, align 1
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%val2 = load i64 , i64 *%src2, align 2
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%sub = sub i64 %val1, %val2
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store i64 %sub, i64 *%dst, align 4
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ret i64 %sub
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}
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