llvm-6502

mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-03-04 21:31:03 +00:00

History

Andrea Di Biagio a069e64112 [X86] Refactor the logic to select horizontal adds/subs to a helper function.

This patch moves part of the logic implemented by the target specific
combine rules added at r210477 to a separate helper function.
This should make easier to add more rules for matching AVX/AVX2 horizontal
adds/subs.

This patch also fixes a problem caused by a wrong check performed on indices
of extract_vector_elt dag nodes in input to the scalar adds/subs.

New tests have been added to verify that we correctly check indices of
extract_vector_elt dag nodes when selecting a horizontal operation.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210644 91177308-0d34-0410-b5e6-96231b3b80d8

2014-06-11 07:57:50 +00:00

Analysis

Removing an "if (!this)" check from two print methods. The condition will

2014-06-09 22:53:16 +00:00

AsmParser

Allow aliases to be unnamed_addr.

2014-06-06 01:20:28 +00:00

Bitcode

Mark a few functions noexcept.

2014-06-10 21:26:47 +00:00

CodeGen

Create macro INITIALIZE_TM_PASS.