llvm-6502/test/CodeGen
Jakob Stoklund Olesen 4bf4bafcce Take allocation hints from copy instructions to/from physregs.
This causes way more identity copies to be generated, ripe for coalescing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103686 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-13 00:19:43 +00:00
..
Alpha
ARM Keep track of the last place a live virtreg was used. 2010-05-11 23:24:45 +00:00
Blackfin
CBackend
CellSPU Make SPU backend not assert on jump tables. 2010-05-11 11:00:02 +00:00
CPP
Generic Enable a bunch more -regalloc=fast tests 2010-05-12 00:11:24 +00:00
MBlaze
Mips
MSP430 Insert ANY_EXTEND node instead of invalid truncate during DAG Combining (X & 1), 2010-05-01 12:52:34 +00:00
PIC16
PowerPC Take allocation hints from copy instructions to/from physregs. 2010-05-13 00:19:43 +00:00
SPARC
SystemZ
Thumb Enable a bunch more -regalloc=fast tests 2010-05-12 00:11:24 +00:00
Thumb2 Clean up the conditional for handling of sign_extend_inreg based on 2010-05-07 18:34:55 +00:00
X86 Take allocation hints from copy instructions to/from physregs. 2010-05-13 00:19:43 +00:00
XCore