Joel Jones 96ef284da4 This change handles a another case for generating the bic instruction ... when a compile time constant is known. This occurs when implicitly zero extending function arguments from 16 bits to 32 bits. The 8 bit case doesn't need to be handled, as the 8 bit constants are encoded directly, thereby not needing a separate load instruction to form the constant into a register. <rdar://problem/11481151> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158659 91177308-0d34-0410-b5e6-96231b3b80d8		2012-06-18 14:51:32 +00:00
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ARM	This change handles a another case for generating the bic instruction	2012-06-18 14:51:32 +00:00
CellSPU
CPP
Generic	Fix test case to work on ARM.	2012-06-11 16:01:14 +00:00
Hexagon
MBlaze
Mips	1. introduce MipsPat in place of Pat in order to exclude those from	2012-06-14 21:03:23 +00:00
MSP430
NVPTX
PowerPC	Cleanup trip-count finding for PPC CTR loops (and some bug fixes).	2012-06-16 20:34:07 +00:00
SPARC
Thumb
Thumb2
X86	Add a regression test for the bug exposed by r158087, which has been	2012-06-18 09:15:04 +00:00
XCore	Fix pattern for MKMSK instruction.	2012-06-13 17:59:12 +00:00