Tom Coxon 01649dea92 [AArch64] Allow access to all system registers with MRS/MSR instructions. ... The A64 instruction set includes a generic register syntax for accessing implementation-defined system registers. The syntax for these registers is: S<op0>_<op1>_<CRn>_<CRm>_<op2> The encoding space permitted for implementation-defined system registers is: op0 op1 CRn CRm op2 11 xxx 1x11 xxxx xxx The full encoding space can now be accessed: op0 op1 CRn CRm op2 xx xxx xxxx xxxx xxx This is useful to anyone needing to write assembly code supporting new system registers before the assembler has learned the official names for them. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218753 91177308-0d34-0410-b5e6-96231b3b80d8		2014-10-01 10:13:59 +00:00
..
AArch64	[AArch64] Allow access to all system registers with MRS/MSR instructions.	2014-10-01 10:13:59 +00:00
ARM	[Thumb2] ldrexd and strexd are not defined on v7M	2014-09-29 10:57:29 +00:00
AsmParser
COFF	WinCOFFObjectWriter: optimize the string table for common suffices	2014-09-29 22:43:20 +00:00
Disassembler	[mips] Fix disassembly of [ls][wd]c[23], cache, and pref	2014-10-01 08:26:55 +00:00
ELF
MachO	[dwarfdump] Dump full filenames as DW_AT_(decl|call)_file attribute values	2014-09-22 12:36:04 +00:00
Markup
Mips	[mips] Add assembler support for the .set nodsp directive.	2014-09-17 09:01:54 +00:00
PowerPC	Object: BSS/virtual sections don't have contents	2014-09-26 22:32:16 +00:00
Sparc
SystemZ	Exclude known and bugzilled failures from UBSan bootstrap	2014-09-17 20:17:52 +00:00
X86	MC: Use @IMGREL instead of @IMGREL32, which we can't parse	2014-09-25 02:09:18 +00:00