llvm-6502/test/MC
Jim Grosbach 0f3abd8d68 Tweak Thumb1 ADD encoding selection a bit.
When the destination register of an add immediate instruction is
explicitly specified, encoding T1 is preferred, else encoding T2 is
preferred.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138862 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-31 17:07:33 +00:00
..
ARM Tweak Thumb1 ADD encoding selection a bit. 2011-08-31 17:07:33 +00:00
AsmParser Fix AsmParser binary precedence for shift operators. 2011-08-20 16:24:13 +00:00
COFF
Disassembler Fix issues with disassembly of IT instructions involving condition codes other the EQ/NE. Discovered by roundtrip testing. 2011-08-30 22:58:27 +00:00
ELF Fix the bitwidth of the remaining fields. 2011-08-04 17:00:11 +00:00
MachO Some autoconf tests use module level inline asm to test compiler's handling of 2011-08-24 22:31:37 +00:00
MBlaze
X86 Re-write part of VEX encoding logic, to be more easy to read! Also fix 2011-08-19 22:27:29 +00:00