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0f3abd8d68
When the destination register of an add immediate instruction is explicitly specified, encoding T1 is preferred, else encoding T2 is preferred. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138862 91177308-0d34-0410-b5e6-96231b3b80d8 |
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ARM | ||
AsmParser | ||
COFF | ||
Disassembler | ||
ELF | ||
MachO | ||
MBlaze | ||
X86 |