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0f63075613
llvm-6502/test/MC
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Bill Wendling 0f63075613 Proper encoding for VLDM and VSTM instructions. The register lists for these 
instructions have to distinguish between lists of single- and double-precision
registers in order for the ASM matcher to do a proper job. In all other
respects, a list of single- or double-precision registers are the same as a list
of GPR registers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119460 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-17 04:32:08 +00:00
..
ARM Proper encoding for VLDM and VSTM instructions. The register lists for these 2010-11-17 04:32:08 +00:00
AsmParser
COFF
Disassembler Segregate tests by target. 2010-11-14 18:14:32 +00:00
ELF A bit more of gnu as compatibility when handling relocations with aliases. 2010-11-16 04:11:46 +00:00
MachO Change the 11 byte nop to be a single instruction. 2010-11-15 23:10:30 +00:00
MBlaze
X86