Scott Michel 8bf61e8c2a Add necessary 64-bit support so that gcc frontend compiles (mostly). Current ... issue is operand promotion for setcc/select... but looks like the fundamental stuff is implemented for CellSPU. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51884 91177308-0d34-0410-b5e6-96231b3b80d8		2008-06-02 22:18:03 +00:00
..
and_ops_more.ll
and_ops.ll
call_indirect.ll
call.ll
ctpop.ll
dg.exp	sabre brings to my attention that the 'tr' suffix is also obsolete	2008-05-20 21:00:03 +00:00
dp_farith.ll
eqv.ll
extract_elt.ll
fcmp.ll
fdiv.ll
fneg-fabs.ll
icmp8.ll
icmp16.ll
icmp32.ll
immed16.ll
immed32.ll
immed64.ll	Add necessary 64-bit support so that gcc frontend compiles (mostly). Current	2008-06-02 22:18:03 +00:00
int2fp.ll
intrinsics_branch.ll
intrinsics_float.ll
intrinsics_logical.ll
mul_ops.ll
nand.ll
or_ops.ll
rotate_ops.ll
select_bits.ll
shift_ops.ll
sp_farith.ll
struct_1.ll
vec_const.ll
vecinsert.ll