llvm-6502/test/MC
Jack Carter 3185f9a2ea The instruction DINS may be transformed into DINSU or DEXTM depending
on the size of the extraction and its position in the 64 bit word.

This patch allows support of the dext transformations with mips64 direct
object output.

0 <= msb < 32 0 <= lsb < 32 0 <= pos < 32 1 <= size <= 32
DINS
The field is entirely contained in the right-most word of the doubleword

32 <= msb < 64 0 <= lsb < 32 0 <= pos < 32 2 <= size <= 64
DINSM
The field straddles the words of the doubleword

32 <= msb < 64 32 <= lsb < 64 32 <= pos < 64 1 <= size <= 32
DINSU
The field is entirely contained in the left-most word of the doubleword



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163010 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-31 18:06:48 +00:00
..
ARM Support fpv4 for ARM Cortex-M4. 2012-08-02 08:35:55 +00:00
AsmParser Fix macros arguments with an underscore, dot or dollar in them. This is based 2012-08-21 18:29:30 +00:00
COFF llvm/test/MC/COFF/seh.s: Fixup corresponding to r161487. 2012-08-08 13:27:04 +00:00
Disassembler ARM: Move Thumb2 tests to Thumb2 test file and fix CHECK lines. 2012-08-13 22:25:44 +00:00
ELF Give this test an explicit triple. 2012-08-12 08:21:27 +00:00
MachO Add .pushsection', .popsection', and `.previous' directives to Darwin ASM. 2012-08-08 06:30:30 +00:00
MBlaze
Mips The instruction DINS may be transformed into DINSU or DEXTM depending 2012-08-31 18:06:48 +00:00
X86 X86: Fix encoding of 'movd %xmm0, %rax' 2012-08-31 00:30:30 +00:00