mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-10-01 10:57:21 +00:00
929bdb2379
By default, the behavior of IT block generation will be determinated dynamically base on the arch (armv8 vs armv7). This patch adds backend options: -arm-restrict-it and -arm-no-restrict-it. The former one restricts the generation of IT blocks (the same behavior as thumbv8) for both arches. The later one allows the generation of legacy IT block (the same behavior as ARMv7 Thumb2) for both arches. Clang will support -mrestrict-it and -mno-restrict-it, which is compatible with GCC. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194592 91177308-0d34-0410-b5e6-96231b3b80d8
64 lines
1.2 KiB
LLVM
64 lines
1.2 KiB
LLVM
; RUN: llc < %s -mtriple=thumbv8 | FileCheck %s
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; RUN: llc < %s -mtriple=thumbv7 -arm-restrict-it | FileCheck %s
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; CHECK: it ne
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; CHECK-NEXT: cmpne
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; CHECK-NEXT: beq
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; CHECK: cmp
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; CHECK-NEXT: beq
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; CHECK-NEXT: %if.else163
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; CHECK-NEXT: mov.w
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; CHECK-NEXT: b
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; CHECK-NEXT: %if.else145
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; CHECK-NEXT: mov.w
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%struct.hc = type { i32, i32, i32, i32 }
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define i32 @t(i32 %type) optsize {
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entry:
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br i1 undef, label %if.then, label %if.else
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if.then:
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unreachable
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if.else:
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br i1 undef, label %if.then15, label %if.else18
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if.then15:
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unreachable
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if.else18:
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switch i32 %type, label %if.else173 [
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i32 3, label %if.then115
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i32 1, label %if.then102
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]
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if.then102:
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br i1 undef, label %cond.true10.i, label %t.exit
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cond.true10.i:
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br label %t.exit
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t.exit:
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unreachable
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if.then115:
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br i1 undef, label %if.else163, label %if.else145
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if.else145:
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%call150 = call fastcc %struct.hc* @foo(%struct.hc* undef, i32 34865152) optsize
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br label %while.body172
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if.else163:
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%call168 = call fastcc %struct.hc* @foo(%struct.hc* undef, i32 34078720) optsize
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br label %while.body172
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while.body172:
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br label %while.body172
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if.else173:
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ret i32 -1
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}
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declare hidden fastcc %struct.hc* @foo(%struct.hc* nocapture, i32) nounwind optsize
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