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https://github.com/c64scene-ar/llvm-6502.git
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24f0469865
This patch adds support for the following new instructions in the Power ISA 2.07: vpksdss vpksdus vpkudus vpkudum vupkhsw vupklsw These instructions are available through the vec_packs, vec_packsu, vec_unpackh, and vec_unpackl built-in interfaces. These are lane-sensitive instructions, so the built-ins have different implementations for big- and little-endian, and the instructions must be marked as killing the vector swap optimization for now. The first three instructions perform saturating pack operations. The fourth performs a modulo pack operation, which means it can be represented with a vector shuffle, and conversely the appropriate vector shuffles may cause this instruction to be generated. The other instructions are only generated via built-in support for now. Appropriate tests have been added. There is a companion patch to clang for the rest of this support. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237499 91177308-0d34-0410-b5e6-96231b3b80d8
44 lines
1.5 KiB
LLVM
44 lines
1.5 KiB
LLVM
; RUN: llc -mcpu=pwr8 -mtriple=powerpc64le-unknown-linux-gnu -mattr=+power8-vector < %s | FileCheck %s
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define void @VPKUDUM_unary(<2 x i64>* %A) {
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entry:
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%tmp = load <2 x i64>, <2 x i64>* %A
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%tmp2 = bitcast <2 x i64> %tmp to <4 x i32>
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%tmp3 = extractelement <4 x i32> %tmp2, i32 0
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%tmp4 = extractelement <4 x i32> %tmp2, i32 2
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%tmp5 = insertelement <4 x i32> undef, i32 %tmp3, i32 0
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%tmp6 = insertelement <4 x i32> %tmp5, i32 %tmp4, i32 1
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%tmp7 = insertelement <4 x i32> %tmp6, i32 %tmp3, i32 2
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%tmp8 = insertelement <4 x i32> %tmp7, i32 %tmp4, i32 3
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%tmp9 = bitcast <4 x i32> %tmp8 to <2 x i64>
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store <2 x i64> %tmp9, <2 x i64>* %A
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ret void
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}
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; CHECK-LABEL: @VPKUDUM_unary
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; CHECK-NOT: vperm
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; CHECK: vpkudum
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define void @VPKUDUM(<2 x i64>* %A, <2 x i64>* %B) {
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entry:
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%tmp = load <2 x i64>, <2 x i64>* %A
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%tmp2 = bitcast <2 x i64> %tmp to <4 x i32>
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%tmp3 = load <2 x i64>, <2 x i64>* %B
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%tmp4 = bitcast <2 x i64> %tmp3 to <4 x i32>
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%tmp5 = extractelement <4 x i32> %tmp2, i32 0
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%tmp6 = extractelement <4 x i32> %tmp2, i32 2
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%tmp7 = extractelement <4 x i32> %tmp4, i32 0
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%tmp8 = extractelement <4 x i32> %tmp4, i32 2
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%tmp9 = insertelement <4 x i32> undef, i32 %tmp5, i32 0
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%tmp10 = insertelement <4 x i32> %tmp9, i32 %tmp6, i32 1
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%tmp11 = insertelement <4 x i32> %tmp10, i32 %tmp7, i32 2
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%tmp12 = insertelement <4 x i32> %tmp11, i32 %tmp8, i32 3
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%tmp13 = bitcast <4 x i32> %tmp12 to <2 x i64>
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store <2 x i64> %tmp13, <2 x i64>* %A
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ret void
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}
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; CHECK-LABEL: @VPKUDUM
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; CHECK-NOT: vperm
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; CHECK: vpkudum
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