Hal Finkel 100eab89f5 [PowerPC] Support register name prefixes for vector registers ... Match binutils by supporting the optional register name prefix for new vector registers ("vs" for VSX registers and "q" for QPX registers). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235665 91177308-0d34-0410-b5e6-96231b3b80d8		2015-04-23 23:16:22 +00:00
..
Analysis	[getUnderlyingOjbects] Analyze loop PHIs further to remove false positives	2015-04-23 20:09:20 +00:00
Assembler
Bindings
Bitcode	Be more strict about the operand for the array type in BitcodeReader	2015-04-23 13:38:21 +00:00
BugPoint
CodeGen	[PowerPC] Use sync inst alias when printing	2015-04-23 23:05:08 +00:00
DebugInfo	Unxfail passing test on Hexagon	2015-04-22 21:41:24 +00:00
ExecutionEngine
Feature
FileCheck
Instrumentation
Integer
JitListener
Linker	Linker: Add flag to override linkage rules	2015-04-22 04:11:00 +00:00
LTO
MC	[PowerPC] Support register name prefixes for vector registers	2015-04-23 23:16:22 +00:00
Object	Support arm32 R_ARM_V4BX relocation format	2015-04-22 15:26:43 +00:00
Other
SymbolRewriter
TableGen
tools
Transforms	[NVPTX] run SeparateConstOffsetFromGEP before SLSR	2015-04-23 20:00:04 +00:00
Unit
Verifier
YAMLParser
.clang-format
CMakeLists.txt
lit.cfg
lit.site.cfg.in
Makefile
Makefile.tests
TestRunner.sh