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101025c33d
Patch by Bill Seurer; committed on his behalf. These test cases generate slightly different code sequences when VSX is activated and thus fail. The update turns off VSX explicitly for the existing checks and then adds a second set of checks for most of them that test the VSX instruction output. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220019 91177308-0d34-0410-b5e6-96231b3b80d8
31 lines
1.4 KiB
LLVM
31 lines
1.4 KiB
LLVM
; RUN: llc < %s -mattr=-vsx -march=ppc32 -mattr=+altivec --enable-unsafe-fp-math | FileCheck %s
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; RUN: llc < %s -mattr=+vsx -march=ppc32 -mattr=+altivec --enable-unsafe-fp-math | FileCheck -check-prefix=CHECK-VSX %s
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define void @VXOR(<4 x float>* %P1, <4 x i32>* %P2, <4 x float>* %P3) {
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%tmp = load <4 x float>* %P3 ; <<4 x float>> [#uses=1]
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%tmp3 = load <4 x float>* %P1 ; <<4 x float>> [#uses=1]
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%tmp4 = fmul <4 x float> %tmp, %tmp3 ; <<4 x float>> [#uses=1]
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store <4 x float> %tmp4, <4 x float>* %P3
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store <4 x float> zeroinitializer, <4 x float>* %P1
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store <4 x i32> zeroinitializer, <4 x i32>* %P2
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ret void
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}
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; The fmul will spill a vspltisw to create a -0.0 vector used as the addend
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; to vmaddfp (so it would IEEE compliant with zero sign propagation).
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; CHECK: @VXOR
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; CHECK: vsplti
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; CHECK: vxor
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; CHECK-VSX: @VXOR
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; CHECK-VSX: vxor
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; CHECK-VSX: xvmulsp
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define void @VSPLTI(<4 x i32>* %P2, <8 x i16>* %P3) {
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store <4 x i32> bitcast (<16 x i8> < i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1 > to <4 x i32>), <4 x i32>* %P2
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store <8 x i16> < i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1 >, <8 x i16>* %P3
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ret void
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}
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; CHECK: @VSPLTI
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; CHECK: vsplti
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; CHECK-VSX: @VSPLTI
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; CHECK-VSX: vsplti
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