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llvm-6502/lib/Target/Sparc
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Nate Begeman ee625573b5 Remove TLI.LowerReturnTo, and just let targets custom lower ISD::RET for 
the same functionality.  This addresses another piece of bug 680.  Next,
on to fixing Alpha VAARG, which I broke last time.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25696 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-27 21:09:22 +00:00
..
.cvsignore
DelaySlotFiller.cpp
FPMover.cpp
Makefile
README.txt
Sparc.h
Sparc.td Subtarget feature can now set any variable to any value 2006-01-27 08:09:42 +00:00
SparcAsmPrinter.cpp
SparcInstrFormats.td
SparcInstrInfo.cpp
SparcInstrInfo.h
SparcInstrInfo.td PHI and INLINEASM are now built-in instructions provided by Target.td 2006-01-27 01:46:15 +00:00
SparcISelDAGToDAG.cpp Remove TLI.LowerReturnTo, and just let targets custom lower ISD::RET for 2006-01-27 21:09:22 +00:00
SparcRegisterInfo.cpp
SparcRegisterInfo.h
SparcRegisterInfo.td
SparcSubtarget.cpp Rest of subtarget support, remove references to ppc 2006-01-26 07:22:22 +00:00
SparcSubtarget.h Rest of subtarget support, remove references to ppc 2006-01-26 07:22:22 +00:00
SparcTargetMachine.cpp
SparcTargetMachine.h

README.txt 

Meta TODO list:
1. Create a new DAG -> DAG instruction selector, by adding patterns to the
   instructions.
2. ???
3. profit!

To-do
-----

* Keep the address of the constant pool in a register instead of forming its
  address all of the time.
* We can fold small constant offsets into the %hi/%lo references to constant
  pool addresses as well.