llvm-6502/test/TableGen/LetInsideMultiClasses.td
Bill Wendling b4be7f6b04 FileCheckize some tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189060 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-22 20:46:05 +00:00

34 lines
646 B
TableGen

// RUN: llvm-tblgen %s | FileCheck %s
// CHECK: bit IsDouble = 1;
// CHECK: bit IsDouble = 1;
// CHECK: bit IsDouble = 1;
// CHECK-NOT: bit IsDouble = 1;
class Instruction<bits<4> opc, string Name> {
bits<4> opcode = opc;
string name = Name;
bit IsDouble = 0;
}
multiclass basic_r<bits<4> opc> {
let name = "newname" in {
def rr : Instruction<opc, "rr">;
def rm : Instruction<opc, "rm">;
}
let name = "othername" in
def rx : Instruction<opc, "rx">;
}
multiclass basic_ss<bits<4> opc> {
let IsDouble = 0 in
defm SS : basic_r<opc>;
let IsDouble = 1 in
defm SD : basic_r<opc>;
}
defm ADD : basic_ss<0xf>;