mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-09-05 01:30:18 +00:00
b95fc31aa2
and code model. This eliminates the need to pass OptLevel flag all over the place and makes it possible for any codegen pass to use this information. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144788 91177308-0d34-0410-b5e6-96231b3b80d8
100 lines
3.2 KiB
C++
100 lines
3.2 KiB
C++
//===-- PPCTargetMachine.h - Define TargetMachine for PowerPC -----*- C++ -*-=//
|
|
//
|
|
// The LLVM Compiler Infrastructure
|
|
//
|
|
// This file is distributed under the University of Illinois Open Source
|
|
// License. See LICENSE.TXT for details.
|
|
//
|
|
//===----------------------------------------------------------------------===//
|
|
//
|
|
// This file declares the PowerPC specific subclass of TargetMachine.
|
|
//
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
#ifndef PPC_TARGETMACHINE_H
|
|
#define PPC_TARGETMACHINE_H
|
|
|
|
#include "PPCFrameLowering.h"
|
|
#include "PPCSubtarget.h"
|
|
#include "PPCJITInfo.h"
|
|
#include "PPCInstrInfo.h"
|
|
#include "PPCISelLowering.h"
|
|
#include "PPCSelectionDAGInfo.h"
|
|
#include "llvm/Target/TargetMachine.h"
|
|
#include "llvm/Target/TargetData.h"
|
|
|
|
namespace llvm {
|
|
class PassManager;
|
|
class GlobalValue;
|
|
|
|
/// PPCTargetMachine - Common code between 32-bit and 64-bit PowerPC targets.
|
|
///
|
|
class PPCTargetMachine : public LLVMTargetMachine {
|
|
PPCSubtarget Subtarget;
|
|
const TargetData DataLayout; // Calculates type size & alignment
|
|
PPCInstrInfo InstrInfo;
|
|
PPCFrameLowering FrameLowering;
|
|
PPCJITInfo JITInfo;
|
|
PPCTargetLowering TLInfo;
|
|
PPCSelectionDAGInfo TSInfo;
|
|
InstrItineraryData InstrItins;
|
|
|
|
public:
|
|
PPCTargetMachine(const Target &T, StringRef TT,
|
|
StringRef CPU, StringRef FS,
|
|
Reloc::Model RM, CodeModel::Model CM,
|
|
CodeGenOpt::Level OL, bool is64Bit);
|
|
|
|
virtual const PPCInstrInfo *getInstrInfo() const { return &InstrInfo; }
|
|
virtual const PPCFrameLowering *getFrameLowering() const {
|
|
return &FrameLowering;
|
|
}
|
|
virtual PPCJITInfo *getJITInfo() { return &JITInfo; }
|
|
virtual const PPCTargetLowering *getTargetLowering() const {
|
|
return &TLInfo;
|
|
}
|
|
virtual const PPCSelectionDAGInfo* getSelectionDAGInfo() const {
|
|
return &TSInfo;
|
|
}
|
|
virtual const PPCRegisterInfo *getRegisterInfo() const {
|
|
return &InstrInfo.getRegisterInfo();
|
|
}
|
|
|
|
virtual const TargetData *getTargetData() const { return &DataLayout; }
|
|
virtual const PPCSubtarget *getSubtargetImpl() const { return &Subtarget; }
|
|
virtual const InstrItineraryData *getInstrItineraryData() const {
|
|
return &InstrItins;
|
|
}
|
|
|
|
// Pass Pipeline Configuration
|
|
virtual bool addInstSelector(PassManagerBase &PM);
|
|
virtual bool addPreEmitPass(PassManagerBase &PM);
|
|
virtual bool addCodeEmitter(PassManagerBase &PM,
|
|
JITCodeEmitter &JCE);
|
|
virtual bool getEnableTailMergeDefault() const;
|
|
};
|
|
|
|
/// PPC32TargetMachine - PowerPC 32-bit target machine.
|
|
///
|
|
class PPC32TargetMachine : public PPCTargetMachine {
|
|
public:
|
|
PPC32TargetMachine(const Target &T, StringRef TT,
|
|
StringRef CPU, StringRef FS,
|
|
Reloc::Model RM, CodeModel::Model CM,
|
|
CodeGenOpt::Level OL);
|
|
};
|
|
|
|
/// PPC64TargetMachine - PowerPC 64-bit target machine.
|
|
///
|
|
class PPC64TargetMachine : public PPCTargetMachine {
|
|
public:
|
|
PPC64TargetMachine(const Target &T, StringRef TT,
|
|
StringRef CPU, StringRef FS,
|
|
Reloc::Model RM, CodeModel::Model CM,
|
|
CodeGenOpt::Level OL);
|
|
};
|
|
|
|
} // end namespace llvm
|
|
|
|
#endif
|