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extended vector types. Remove the special SDNode opcodes used for pre-legalize vector operations, and the special MVT::Vector type used with them. Adjust lowering and legalize to work with the normal SDNode kinds instead, and to use the normal MVT functions to work with vector types instead of using the two special operands that the pre-legalize nodes held. This allows pre-legalize and post-legalize DAGs, and the code that operates on them, to be more consistent. Pre-legalize vector operators can be handled more consistently with scalar operators. And, -view-dag-combine1-dags and -view-legalize-dags now look prettier for vector code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37719 91177308-0d34-0410-b5e6-96231b3b80d8
203 lines
6.6 KiB
C++
203 lines
6.6 KiB
C++
//===-- llvm/CallingConvLower.h - Calling Conventions -----------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by Chris Lattner and is distributed under
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// the University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file declares the CCState and CCValAssign classes, used for lowering
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// and implementing calling conventions.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_CODEGEN_CALLINGCONVLOWER_H
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#define LLVM_CODEGEN_CALLINGCONVLOWER_H
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#include "llvm/ADT/SmallVector.h"
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#include "llvm/CodeGen/ValueTypes.h"
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namespace llvm {
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class MRegisterInfo;
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class TargetMachine;
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class CCState;
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class SDNode;
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/// CCValAssign - Represent assignment of one arg/retval to a location.
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class CCValAssign {
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public:
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enum LocInfo {
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Full, // The value fills the full location.
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SExt, // The value is sign extended in the location.
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ZExt, // The value is zero extended in the location.
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AExt // The value is extended with undefined upper bits.
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// TODO: a subset of the value is in the location.
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};
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private:
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/// ValNo - This is the value number begin assigned (e.g. an argument number).
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unsigned ValNo;
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/// Loc is either a stack offset or a register number.
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unsigned Loc;
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/// isMem - True if this is a memory loc, false if it is a register loc.
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bool isMem : 1;
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/// Information about how the value is assigned.
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LocInfo HTP : 7;
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/// ValVT - The type of the value being assigned.
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MVT::ValueType ValVT;
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/// LocVT - The type of the location being assigned to.
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MVT::ValueType LocVT;
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public:
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static CCValAssign getReg(unsigned ValNo, MVT::ValueType ValVT,
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unsigned RegNo, MVT::ValueType LocVT,
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LocInfo HTP) {
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CCValAssign Ret;
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Ret.ValNo = ValNo;
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Ret.Loc = RegNo;
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Ret.isMem = false;
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Ret.HTP = HTP;
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Ret.ValVT = ValVT;
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Ret.LocVT = LocVT;
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return Ret;
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}
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static CCValAssign getMem(unsigned ValNo, MVT::ValueType ValVT,
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unsigned Offset, MVT::ValueType LocVT,
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LocInfo HTP) {
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CCValAssign Ret;
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Ret.ValNo = ValNo;
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Ret.Loc = Offset;
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Ret.isMem = true;
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Ret.HTP = HTP;
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Ret.ValVT = ValVT;
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Ret.LocVT = LocVT;
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return Ret;
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}
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unsigned getValNo() const { return ValNo; }
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MVT::ValueType getValVT() const { return ValVT; }
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bool isRegLoc() const { return !isMem; }
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bool isMemLoc() const { return isMem; }
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unsigned getLocReg() const { assert(isRegLoc()); return Loc; }
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unsigned getLocMemOffset() const { assert(isMemLoc()); return Loc; }
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MVT::ValueType getLocVT() const { return LocVT; }
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LocInfo getLocInfo() const { return HTP; }
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};
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/// CCAssignFn - This function assigns a location for Val, updating State to
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/// reflect the change.
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typedef bool CCAssignFn(unsigned ValNo, MVT::ValueType ValVT,
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MVT::ValueType LocVT, CCValAssign::LocInfo LocInfo,
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unsigned ArgFlags, CCState &State);
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/// CCState - This class holds information needed while lowering arguments and
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/// return values. It captures which registers are already assigned and which
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/// stack slots are used. It provides accessors to allocate these values.
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class CCState {
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unsigned CallingConv;
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bool IsVarArg;
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const TargetMachine &TM;
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const MRegisterInfo &MRI;
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SmallVector<CCValAssign, 16> &Locs;
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unsigned StackOffset;
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SmallVector<uint32_t, 16> UsedRegs;
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public:
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CCState(unsigned CC, bool isVarArg, const TargetMachine &TM,
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SmallVector<CCValAssign, 16> &locs);
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void addLoc(const CCValAssign &V) {
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Locs.push_back(V);
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}
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const TargetMachine &getTarget() const { return TM; }
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unsigned getCallingConv() const { return CallingConv; }
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bool isVarArg() const { return IsVarArg; }
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unsigned getNextStackOffset() const { return StackOffset; }
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/// isAllocated - Return true if the specified register (or an alias) is
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/// allocated.
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bool isAllocated(unsigned Reg) const {
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return UsedRegs[Reg/32] & (1 << (Reg&31));
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}
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/// AnalyzeFormalArguments - Analyze an ISD::FORMAL_ARGUMENTS node,
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/// incorporating info about the formals into this state.
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void AnalyzeFormalArguments(SDNode *TheArgs, CCAssignFn Fn);
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/// AnalyzeReturn - Analyze the returned values of an ISD::RET node,
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/// incorporating info about the result values into this state.
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void AnalyzeReturn(SDNode *TheRet, CCAssignFn Fn);
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/// AnalyzeCallOperands - Analyze an ISD::CALL node, incorporating info
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/// about the passed values into this state.
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void AnalyzeCallOperands(SDNode *TheCall, CCAssignFn Fn);
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/// AnalyzeCallResult - Analyze the return values of an ISD::CALL node,
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/// incorporating info about the passed values into this state.
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void AnalyzeCallResult(SDNode *TheCall, CCAssignFn Fn);
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/// getFirstUnallocated - Return the first unallocated register in the set, or
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/// NumRegs if they are all allocated.
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unsigned getFirstUnallocated(const unsigned *Regs, unsigned NumRegs) const {
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for (unsigned i = 0; i != NumRegs; ++i)
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if (!isAllocated(Regs[i]))
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return i;
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return NumRegs;
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}
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/// AllocateReg - Attempt to allocate one register. If it is not available,
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/// return zero. Otherwise, return the register, marking it and any aliases
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/// as allocated.
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unsigned AllocateReg(unsigned Reg) {
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if (isAllocated(Reg)) return 0;
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MarkAllocated(Reg);
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return Reg;
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}
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/// AllocateReg - Attempt to allocate one of the specified registers. If none
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/// are available, return zero. Otherwise, return the first one available,
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/// marking it and any aliases as allocated.
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unsigned AllocateReg(const unsigned *Regs, unsigned NumRegs) {
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unsigned FirstUnalloc = getFirstUnallocated(Regs, NumRegs);
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if (FirstUnalloc == NumRegs)
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return 0; // Didn't find the reg.
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// Mark the register and any aliases as allocated.
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unsigned Reg = Regs[FirstUnalloc];
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MarkAllocated(Reg);
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return Reg;
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}
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/// AllocateStack - Allocate a chunk of stack space with the specified size
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/// and alignment.
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unsigned AllocateStack(unsigned Size, unsigned Align) {
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assert(Align && ((Align-1) & Align) == 0); // Align is power of 2.
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StackOffset = ((StackOffset + Align-1) & ~(Align-1));
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unsigned Result = StackOffset;
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StackOffset += Size;
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return Result;
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}
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private:
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/// MarkAllocated - Mark a register and all of its aliases as allocated.
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void MarkAllocated(unsigned Reg);
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};
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} // end namespace llvm
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#endif
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