mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-11-19 01:13:25 +00:00
94bd57e154
sequences in SPUDAGToDAGISel.cpp and SPU64InstrInfo.td, killing custom DAG node types as needed. - i64 mul is now a legal instruction, but emits an instruction sequence that stretches tblgen and the imagination, as well as violating laws of several small countries and most southern US states (just kidding, but looking at a function with 80+ parameters is really weird and just plain wrong.) - Update tests as needed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62254 91177308-0d34-0410-b5e6-96231b3b80d8
58 lines
1.4 KiB
LLVM
58 lines
1.4 KiB
LLVM
; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s
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; RUN: grep xswd %t1.s | count 3
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; RUN: grep xsbh %t1.s | count 1
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; RUN: grep xshw %t1.s | count 2
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; RUN: grep shufb %t1.s | count 7
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; RUN: grep cg %t1.s | count 4
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; RUN: grep addx %t1.s | count 4
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; RUN: grep fsmbi %t1.s | count 3
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; RUN: grep il %t1.s | count 2
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; RUN: grep mpy %t1.s | count 10
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; RUN: grep mpyh %t1.s | count 6
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; RUN: grep mpyhhu %t1.s | count 2
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; RUN: grep mpyu %t1.s | count 4
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; ModuleID = 'stores.bc'
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target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128"
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target triple = "spu"
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define i64 @sext_i64_i8(i8 %a) nounwind {
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%1 = sext i8 %a to i64
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ret i64 %1
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}
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define i64 @sext_i64_i16(i16 %a) nounwind {
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%1 = sext i16 %a to i64
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ret i64 %1
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}
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define i64 @sext_i64_i32(i32 %a) nounwind {
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%1 = sext i32 %a to i64
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ret i64 %1
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}
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define i64 @zext_i64_i8(i8 %a) nounwind {
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%1 = zext i8 %a to i64
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ret i64 %1
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}
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define i64 @zext_i64_i16(i16 %a) nounwind {
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%1 = zext i16 %a to i64
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ret i64 %1
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}
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define i64 @zext_i64_i32(i32 %a) nounwind {
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%1 = zext i32 %a to i64
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ret i64 %1
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}
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define i64 @add_i64(i64 %a, i64 %b) nounwind {
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%1 = add i64 %a, %b
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ret i64 %1
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}
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define i64 @mul_i64(i64 %a, i64 %b) nounwind {
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%1 = mul i64 %a, %b
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ret i64 %1
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}
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