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38c6b58eec
Summary: AsmPrinter::EmitInlineAsm() will no longer use the EmitRawText() call for targets with mature MC support. Such targets will always parse the inline assembly (even when emitting assembly). Targets without mature MC support continue to use EmitRawText() for assembly output. The hasRawTextSupport() check in AsmPrinter::EmitInlineAsm() has been replaced with MCAsmInfo::UseIntegratedAs which when true, causes the integrated assembler to parse inline assembly (even when emitting assembly output). UseIntegratedAs is set to true for targets that consider any failure to parse valid assembly to be a bug. Target specific subclasses generally enable the integrated assembler in their constructor. The default value can be overridden with -no-integrated-as. All tests that rely on inline assembly supporting invalid assembly (for example, those that use mnemonics such as 'foo' or 'hello world') have been updated to disable the integrated assembler. Changes since review (and last commit attempt): - Fixed test failures that were missed due to configuration of local build. (fixes crash.ll and a couple others). - Fixed tests that happened to pass because the local build was on X86 (should fix 2007-12-17-InvokeAsm.ll) - mature-mc-support.ll's should no longer require all targets to be compiled. (should fix ARM and PPC buildbots) - Object output (-filetype=obj and similar) now forces the integrated assembler to be enabled regardless of default setting or -no-integrated-as. (should fix SystemZ buildbots) Reviewers: rafael Reviewed By: rafael CC: llvm-commits Differential Revision: http://llvm-reviews.chandlerc.com/D2686 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201333 91177308-0d34-0410-b5e6-96231b3b80d8
77 lines
2.0 KiB
LLVM
77 lines
2.0 KiB
LLVM
; RUN: llc < %s -march=x86 -no-integrated-as
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define i32 @test1() nounwind {
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; Dest is AX, dest type = i32.
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%tmp4 = call i32 asm sideeffect "FROB $0", "={ax}"()
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ret i32 %tmp4
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}
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define void @test2(i32 %V) nounwind {
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; input is AX, in type = i32.
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call void asm sideeffect "FROB $0", "{ax}"(i32 %V)
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ret void
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}
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define void @test3() nounwind {
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; FP constant as a memory operand.
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tail call void asm sideeffect "frob $0", "m"( float 0x41E0000000000000)
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ret void
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}
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define void @test4() nounwind {
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; J means a constant in range 0 to 63.
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tail call void asm sideeffect "bork $0", "J"(i32 37) nounwind
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ret void
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}
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; rdar://9738585
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define i32 @test5() nounwind {
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entry:
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%0 = tail call i32 asm "test", "=l,~{dirflag},~{fpsr},~{flags}"() nounwind
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ret i32 0
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}
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; rdar://9777108 PR10352
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define void @test6(i1 zeroext %desired) nounwind {
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entry:
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tail call void asm sideeffect "foo $0", "q,~{dirflag},~{fpsr},~{flags}"(i1 %desired) nounwind
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ret void
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}
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define void @test7(i1 zeroext %desired, i32* %p) nounwind {
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entry:
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%0 = tail call i8 asm sideeffect "xchg $0, $1", "=r,*m,0,~{memory},~{dirflag},~{fpsr},~{flags}"(i32* %p, i1 %desired) nounwind
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ret void
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}
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; <rdar://problem/11542429>
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; The constrained GR32_ABCD register class of the 'q' constraint requires
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; special handling after the preceding outputs used up eax-edx.
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define void @constrain_abcd(i8* %h) nounwind ssp {
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entry:
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%0 = call { i32, i32, i32, i32, i32 } asm sideeffect "", "=&r,=&r,=&r,=&r,=&q,r,~{ecx},~{memory},~{dirflag},~{fpsr},~{flags}"(i8* %h) nounwind
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ret void
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}
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; Mix normal and EC defs of the same register.
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define i32 @pr14376() nounwind noinline {
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entry:
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%asm = tail call i32 asm sideeffect "", "={ax},i,~{eax},~{flags},~{rax}"(i64 61) nounwind
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ret i32 %asm
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}
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@test8_v = global i32 42
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define void @test8() {
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call void asm sideeffect "${0:P}", "i"( i32* @test8_v )
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ret void
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}
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define void @test9() {
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call void asm sideeffect "${0:P}", "X"( i8* blockaddress(@test9, %bb) )
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br label %bb
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bb:
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ret void
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}
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