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https://github.com/c64scene-ar/llvm-6502.git
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31cbac1cfe
There was a previous implementation with patterns that would have matched e.g. shl <v4i32> <i32>, but this is not valid LLVM IR so they never were selected. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126998 91177308-0d34-0410-b5e6-96231b3b80d8 |
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Alpha | ||
ARM | ||
Blackfin | ||
CBackend | ||
CellSPU | ||
CPP | ||
Generic | ||
MBlaze | ||
Mips | ||
MSP430 | ||
PowerPC | ||
PTX | ||
SPARC | ||
SystemZ | ||
Thumb | ||
Thumb2 | ||
X86 | ||
XCore |