llvm-6502/test/CodeGen
Hal Finkel 10f7f2a222 Add support for spilling VRSAVE on PPC
Although there is only one Altivec VRSAVE register, it is a member of
a register class, and we need the ability to spill it. Because this
register is normally callee-preserved and handled by special code this
has never before been necessary. However, this capability will be required by
a forthcoming commit adding SjLj support.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177654 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-21 19:03:21 +00:00
..
AArch64
ARM Avoid NEON SP-FP unless unsafe-math or Darwin 2013-03-21 18:47:47 +00:00
CPP
Generic Add a test case for PR15318 fixed in r177472 2013-03-20 06:18:06 +00:00
Hexagon
Inputs Remove unused field in DICompileUnit 2013-03-20 22:34:33 +00:00
MBlaze
Mips
MSP430
NVPTX Propagate DAG node ordering during type legalization and instruction selection 2013-03-20 00:10:32 +00:00
PowerPC Add support for spilling VRSAVE on PPC 2013-03-21 19:03:21 +00:00
R600
SI
SPARC
Thumb
Thumb2
X86 Debug info: refactor the first field of DICompileUnit to be a raw file/directory pair 2013-03-20 23:58:12 +00:00
XCore