Stuart Hastings 10ff0bbdfb Add support for x86 CMPEQSS and friends. These instructions do a ...

floating-point comparison, generate a mask of 0s or 1s, and generally
DTRT with NaNs.  Only profitable when the user wants a materialized 0
or 1 at runtime.  rdar://problem/5993888


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132404 91177308-0d34-0410-b5e6-96231b3b80d8

2011-06-01 17:17:45 +00:00

..

Alpha

…

ARM

On Darwin ARM, set the UNWIND_RESUME libcall to _Unwind_SjLj_Resume.

2011-05-29 19:50:32 +00:00

Blackfin

…

CBackend

…

CellSPU

…

CPP

…

Generic

This patch is another step in the direction of adding vector select. In this

2011-06-01 12:51:46 +00:00

MBlaze

…

Mips

This patch implements atomic intrinsics atomic.load.add (sub,and,or,xor,

2011-05-31 02:54:07 +00:00

MSP430

…

PowerPC

…

PTX

…

SPARC

…

SystemZ

…

Thumb

…

Thumb2

…

X86

Add support for x86 CMPEQSS and friends. These instructions do a

2011-06-01 17:17:45 +00:00

XCore

Add XCore intrinsic for crc8.

2011-05-31 16:24:49 +00:00