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3cd8cf6bbd
The default rounding mode to initialize the mode register needs to be reported to the runtime. Fill in other bits a kernel may be interested in setting for future use. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211791 91177308-0d34-0410-b5e6-96231b3b80d8
89 lines
4.2 KiB
C++
89 lines
4.2 KiB
C++
//===-- SIDefines.h - SI Helper Macros ----------------------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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/// \file
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//===----------------------------------------------------------------------===//
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#ifndef SIDEFINES_H_
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#define SIDEFINES_H_
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namespace SIInstrFlags {
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enum {
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MIMG = 1 << 3,
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SMRD = 1 << 4,
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VOP1 = 1 << 5,
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VOP2 = 1 << 6,
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VOP3 = 1 << 7,
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VOPC = 1 << 8,
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SALU = 1 << 9
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};
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}
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#define R_00B028_SPI_SHADER_PGM_RSRC1_PS 0x00B028
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#define R_00B02C_SPI_SHADER_PGM_RSRC2_PS 0x00B02C
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#define S_00B02C_EXTRA_LDS_SIZE(x) (((x) & 0xFF) << 8)
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#define R_00B128_SPI_SHADER_PGM_RSRC1_VS 0x00B128
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#define R_00B228_SPI_SHADER_PGM_RSRC1_GS 0x00B228
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#define R_00B848_COMPUTE_PGM_RSRC1 0x00B848
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#define S_00B028_VGPRS(x) (((x) & 0x3F) << 0)
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#define S_00B028_SGPRS(x) (((x) & 0x0F) << 6)
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#define R_00B84C_COMPUTE_PGM_RSRC2 0x00B84C
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#define S_00B84C_LDS_SIZE(x) (((x) & 0x1FF) << 15)
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#define R_0286CC_SPI_PS_INPUT_ENA 0x0286CC
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#define R_00B848_COMPUTE_PGM_RSRC1 0x00B848
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#define S_00B848_VGPRS(x) (((x) & 0x3F) << 0)
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#define G_00B848_VGPRS(x) (((x) >> 0) & 0x3F)
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#define C_00B848_VGPRS 0xFFFFFFC0
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#define S_00B848_SGPRS(x) (((x) & 0x0F) << 6)
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#define G_00B848_SGPRS(x) (((x) >> 6) & 0x0F)
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#define C_00B848_SGPRS 0xFFFFFC3F
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#define S_00B848_PRIORITY(x) (((x) & 0x03) << 10)
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#define G_00B848_PRIORITY(x) (((x) >> 10) & 0x03)
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#define C_00B848_PRIORITY 0xFFFFF3FF
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#define S_00B848_FLOAT_MODE(x) (((x) & 0xFF) << 12)
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#define G_00B848_FLOAT_MODE(x) (((x) >> 12) & 0xFF)
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#define C_00B848_FLOAT_MODE 0xFFF00FFF
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#define S_00B848_PRIV(x) (((x) & 0x1) << 20)
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#define G_00B848_PRIV(x) (((x) >> 20) & 0x1)
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#define C_00B848_PRIV 0xFFEFFFFF
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#define S_00B848_DX10_CLAMP(x) (((x) & 0x1) << 21)
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#define G_00B848_DX10_CLAMP(x) (((x) >> 21) & 0x1)
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#define C_00B848_DX10_CLAMP 0xFFDFFFFF
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#define S_00B848_DEBUG_MODE(x) (((x) & 0x1) << 22)
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#define G_00B848_DEBUG_MODE(x) (((x) >> 22) & 0x1)
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#define C_00B848_DEBUG_MODE 0xFFBFFFFF
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#define S_00B848_IEEE_MODE(x) (((x) & 0x1) << 23)
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#define G_00B848_IEEE_MODE(x) (((x) >> 23) & 0x1)
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#define C_00B848_IEEE_MODE 0xFF7FFFFF
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// Helpers for setting FLOAT_MODE
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#define FP_ROUND_ROUND_TO_NEAREST 0
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#define FP_ROUND_ROUND_TO_INF 1
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#define FP_ROUND_ROUND_TO_NEGINF 2
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#define FP_ROUND_ROUND_TO_ZERO 3
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// Bits 3:0 control rounding mode. 1:0 control single precision, 3:2 double
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// precision.
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#define FP_ROUND_MODE_SP(x) ((x) & 0x3)
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#define FP_ROUND_MODE_DP(x) (((x) & 0x3) << 2)
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#define FP_DENORM_FLUSH_IN_FLUSH_OUT 0
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#define FP_DENORM_FLUSH_OUT 1
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#define FP_DENORM_FLUSH_IN 2
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#define FP_DENORM_FLUSH_NONE 3
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// Bits 7:4 control denormal handling. 5:4 control single precision, 6:7 double
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// precision.
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#define FP_DENORM_MODE_SP(x) (((x) & 0x3) << 4)
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#define FP_DENORM_MODE_DP(x) (((x) & 0x3) << 6)
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#endif // SIDEFINES_H_
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