llvm-6502

mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-02-06 06:33:24 +00:00

History

Kevin Qin 2daff76c05 [AArch64] Fix a bug generating incorrect instruction when building small vector.

This bug is introduced by r211144. The element of operand may be
smaller than the element of result, but previous commit can
only handle the contrary condition. This commit is to handle this
scenario and generate optimized codes like ZIP1.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213830 91177308-0d34-0410-b5e6-96231b3b80d8

2014-07-24 02:05:42 +00:00

Analysis

…

Assembler

Rename metadata llvm.loop.vectorize.unroll to llvm.loop.vectorize.interleave.

2014-07-21 23:11:03 +00:00

Bindings

[OCaml] Don't truncate constants over 32 bits in Llvm.const_int.

2014-07-22 13:55:20 +00:00

Bitcode

AsmParser: remove deprecated LLIR support

2014-07-23 18:09:31 +00:00